{"block":{"name":"i2c","variant":null,"commit":"1d0cf808c91f76f1d0426628dfa14b906434ff05","commit_short":"1d0cf80","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/1d0cf808c91f76f1d0426628dfa14b906434ff05","revision_info":"GitHub Revision: [`1d0cf80`](https://github.com/lowrisc/opentitan/tree/1d0cf808c91f76f1d0426628dfa14b906434ff05)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-05-28T15:30:27Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/i2c/data/i2c_testplan.html","stages":{"unmapped":{"testpoints":{"Unmapped":{"tests":{"i2c_host_smoke":{"max_time":38.2,"sim_time":4556.708733,"passed":1,"total":1,"percent":100.0},"i2c_host_override":{"max_time":0.9,"sim_time":111.40099599999999,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_watermark":{"max_time":52.98,"sim_time":16081.943971,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_overflow":{"max_time":40.95,"sim_time":27837.018733,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_reset_fmt":{"max_time":1.06,"sim_time":123.067791,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_fmt_empty":{"max_time":8.85,"sim_time":971.533711,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_reset_rx":{"max_time":2.39,"sim_time":632.488107,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_full":{"max_time":65.41,"sim_time":6671.268333,"passed":1,"total":1,"percent":100.0},"i2c_host_perf":{"max_time":3.89,"sim_time":434.048339,"passed":1,"total":1,"percent":100.0},"i2c_host_perf_precise":{"max_time":26.1,"sim_time":23631.015909,"passed":1,"total":1,"percent":100.0},"i2c_host_stretch_timeout":{"max_time":5.92,"sim_time":2022.415037,"passed":1,"total":1,"percent":100.0},"i2c_host_error_intr":{"max_time":0.76,"sim_time":9.694977000000002,"passed":0,"total":1,"percent":0.0},"i2c_host_stress_all":{"max_time":38.66,"sim_time":27491.602759,"passed":0,"total":1,"percent":0.0},"i2c_target_glitch":{"max_time":1.85,"sim_time":719.766367,"passed":0,"total":1,"percent":0.0},"i2c_target_smoke":{"max_time":20.87,"sim_time":3795.055933,"passed":1,"total":1,"percent":100.0},"i2c_target_stress_wr":{"max_time":15.88,"sim_time":11156.391706,"passed":1,"total":1,"percent":100.0},"i2c_target_stress_rd":{"max_time":21.51,"sim_time":3445.711097,"passed":1,"total":1,"percent":100.0},"i2c_target_stretch":{"max_time":29.39,"sim_time":3664.539583,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_smoke":{"max_time":5.37,"sim_time":4981.415644999999,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_stress_wr":{"max_time":6.15,"sim_time":3939.354463,"passed":1,"total":1,"percent":100.0},"i2c_target_timeout":{"max_time":5.38,"sim_time":2725.980889,"passed":1,"total":1,"percent":100.0},"i2c_target_unexp_stop":{"max_time":1.19,"sim_time":66.688026,"passed":0,"total":1,"percent":0.0},"i2c_target_fifo_reset_acq":{"max_time":1.12,"sim_time":381.718545,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_reset_tx":{"max_time":1.05,"sim_time":145.67881599999998,"passed":1,"total":1,"percent":100.0},"i2c_target_perf":{"max_time":2.68,"sim_time":2245.6165189999997,"passed":1,"total":1,"percent":100.0},"i2c_target_stress_all":{"max_time":44.92,"sim_time":21795.978888999998,"passed":1,"total":1,"percent":100.0},"i2c_target_bad_addr":{"max_time":4.73,"sim_time":2519.200704,"passed":1,"total":1,"percent":100.0},"i2c_target_hrst":{"max_time":23.81,"sim_time":10128.809949999999,"passed":0,"total":1,"percent":0.0},"i2c_host_stress_all_with_rand_reset":{"max_time":8.99,"sim_time":1420.587143,"passed":0,"total":1,"percent":0.0},"i2c_target_stress_all_with_rand_reset":{"max_time":26.92,"sim_time":1130.679354,"passed":0,"total":1,"percent":0.0},"i2c_host_mode_toggle":{"max_time":4.48,"sim_time":167.628564,"passed":1,"total":1,"percent":100.0},"i2c_host_may_nack":{"max_time":4.62,"sim_time":1457.202191,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_watermarks_acq":{"max_time":2.04,"sim_time":2038.9007749999996,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_watermarks_tx":{"max_time":1.47,"sim_time":159.67614799999998,"passed":1,"total":1,"percent":100.0},"i2c_target_tx_stretch_ctrl":{"max_time":1.49,"sim_time":72.319341,"passed":1,"total":1,"percent":100.0},"i2c_target_smbus_maxlen":{"max_time":2.62,"sim_time":2127.0527030000003,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_acqfull":{"max_time":2.3,"sim_time":445.09587400000004,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_acqfull_addr":{"max_time":2.12,"sim_time":507.740306,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_txstretch":{"max_time":1.67,"sim_time":838.73883,"passed":1,"total":1,"percent":100.0},"i2c_tl_errors":{"max_time":2.05,"sim_time":655.306457,"passed":1,"total":1,"percent":100.0},"i2c_tl_intg_err":{"max_time":2.23,"sim_time":90.884745,"passed":1,"total":1,"percent":100.0},"i2c_sec_cm":{"max_time":0.9,"sim_time":71.161675,"passed":1,"total":1,"percent":100.0},"i2c_intr_test":{"max_time":0.87,"sim_time":48.852201,"passed":1,"total":1,"percent":100.0},"i2c_alert_test":{"max_time":0.88,"sim_time":143.310531,"passed":1,"total":1,"percent":100.0},"i2c_csr_hw_reset":{"max_time":0.88,"sim_time":18.875594,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":0.72,"sim_time":195.172789,"passed":1,"total":1,"percent":100.0},"i2c_csr_bit_bash":{"max_time":4.06,"sim_time":2390.2170269999997,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":1.71,"sim_time":207.70921900000002,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":1.22,"sim_time":55.450646,"passed":1,"total":1,"percent":100.0},"i2c_csr_mem_rw_with_rand_reset":{"max_time":1.49,"sim_time":112.639856,"passed":1,"total":1,"percent":100.0}},"passed":43,"total":50,"percent":86.0}},"passed":43,"total":50,"percent":86.0}},"coverage":{"code":{"block":null,"line_statement":96.41,"branch":92.33,"condition_expression":85.23,"toggle":89.45,"fsm":44.64},"assertion":97.46,"functional":77.48},"cov_report_page":"/nightly/current_run/scratch/master/i2c-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between":[{"name":"i2c_host_error_intr","qual_name":"0.i2c_host_error_intr.21855865283351707562278735124183281359441739331896066300707829596410481041052","seed":21855865283351707562278735124183281359441739331896066300707829596410481041052,"line":80,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log","log_context":["UVM_INFO @   9694977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"i2c_host_stress_all","qual_name":"0.i2c_host_stress_all.112756719052109142194258304226199091027161380325922802856409583804717306583500","seed":112756719052109142194258304226199091027161380325922802856409583804717306583500,"line":112,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log","log_context":["UVM_INFO @ 27491602759 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between":[{"name":"i2c_target_glitch","qual_name":"0.i2c_target_glitch.62086815391710845024419443845071115817708500731724654070315435467985673000911","seed":62086815391710845024419443845071115817708500731724654070315435467985673000911,"line":84,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log","log_context":["UVM_INFO @ 719766367 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*])":[{"name":"i2c_target_unexp_stop","qual_name":"0.i2c_target_unexp_stop.86122257709456354050203142383151072158246111884388299927020289510257729330914","seed":86122257709456354050203142383151072158246111884388299927020289510257729330914,"line":78,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log","log_context":["UVM_INFO @  66688026 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!":[{"name":"i2c_target_hrst","qual_name":"0.i2c_target_hrst.77720485298447493092606518635312783214567381540977801671330816152555305618539","seed":77720485298447493092606518635312783214567381540977801671330816152555305618539,"line":79,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_hrst/latest/run.log","log_context":["UVM_INFO @ 10128809950 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1286) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"i2c_host_stress_all_with_rand_reset","qual_name":"0.i2c_host_stress_all_with_rand_reset.43058734514370124752740947233733341962166539446119203390833174438166536267898","seed":43058734514370124752740947233733341962166539446119203390833174438166536267898,"line":84,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 1420587143 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1199) [i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.":[{"name":"i2c_target_stress_all_with_rand_reset","qual_name":"0.i2c_target_stress_all_with_rand_reset.106548624506517727522060670962749522179586466425485868085545364340502407667156","seed":106548624506517727522060670962749522179586466425485868085545364340502407667156,"line":96,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 1130679354 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":43,"total":50,"percent":86.0}