{"block":{"name":"uart","variant":null,"commit":"13a8919bceac625dbd1b6ad804e62f9bdeadee86","commit_short":"13a8919","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/13a8919bceac625dbd1b6ad804e62f9bdeadee86","revision_info":"GitHub Revision: [`13a8919`](https://github.com/lowrisc/opentitan/tree/13a8919bceac625dbd1b6ad804e62f9bdeadee86)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-06-16T15:30:34Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/uart/data/uart_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"uart_smoke":{"max_time":1.16,"sim_time":274.316962,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"uart_csr_hw_reset":{"max_time":0.62,"sim_time":54.312241,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"uart_csr_rw":{"max_time":0.7,"sim_time":41.427112,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"uart_csr_bit_bash":{"max_time":2.19,"sim_time":324.625607,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"uart_csr_aliasing":{"max_time":0.85,"sim_time":25.279548,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"uart_csr_mem_rw_with_rand_reset":{"max_time":0.87,"sim_time":26.751407999999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"uart_csr_rw":{"max_time":0.7,"sim_time":41.427112,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":0.85,"sim_time":25.279548,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":6,"total":6,"percent":100.0},"V2":{"testpoints":{"base_random_seq":{"tests":{"uart_tx_rx":{"max_time":8.32,"sim_time":39797.130119999994,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"parity":{"tests":{"uart_smoke":{"max_time":1.16,"sim_time":274.316962,"passed":1,"total":1,"percent":100.0},"uart_tx_rx":{"max_time":8.32,"sim_time":39797.130119999994,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"parity_error":{"tests":{"uart_intr":{"max_time":11.07,"sim_time":22349.004421,"passed":1,"total":1,"percent":100.0},"uart_rx_parity_err":{"max_time":63.10000000000001,"sim_time":102430.05110099999,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"watermark":{"tests":{"uart_tx_rx":{"max_time":8.32,"sim_time":39797.130119999994,"passed":1,"total":1,"percent":100.0},"uart_intr":{"max_time":11.07,"sim_time":22349.004421,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"fifo_full":{"tests":{"uart_fifo_full":{"max_time":84.5,"sim_time":326396.311247,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"fifo_overflow":{"tests":{"uart_fifo_overflow":{"max_time":6.89,"sim_time":4829.456013,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"fifo_reset":{"tests":{"uart_fifo_reset":{"max_time":29.47,"sim_time":107056.795766,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_frame_err":{"tests":{"uart_intr":{"max_time":11.07,"sim_time":22349.004421,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_break_err":{"tests":{"uart_intr":{"max_time":11.07,"sim_time":22349.004421,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_timeout":{"tests":{"uart_intr":{"max_time":11.07,"sim_time":22349.004421,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"perf":{"tests":{"uart_perf":{"max_time":121.31,"sim_time":5438.13625,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sys_loopback":{"tests":{"uart_loopback":{"max_time":6.57,"sim_time":3793.375682,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"line_loopback":{"tests":{"uart_loopback":{"max_time":6.57,"sim_time":3793.375682,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_noise_filter":{"tests":{"uart_noise_filter":{"max_time":0.8,"sim_time":72.27344599999999,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"rx_start_bit_filter":{"tests":{"uart_rx_start_bit_filter":{"max_time":2.16,"sim_time":3408.9471710000003,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tx_overide":{"tests":{"uart_tx_ovrd":{"max_time":1.97,"sim_time":2549.6582719999997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_oversample":{"tests":{"uart_rx_oversample":{"max_time":29.87,"sim_time":6082.405466,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"long_b2b_transfer":{"tests":{"uart_long_xfer_wo_dly":{"max_time":247.65999999999997,"sim_time":155676.81408500002,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_all":{"tests":{"uart_stress_all":{"max_time":4.5,"sim_time":22293.287133,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"alert_test":{"tests":{"uart_alert_test":{"max_time":0.59,"sim_time":16.25116,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"uart_intr_test":{"max_time":0.59,"sim_time":41.158243999999996,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"uart_tl_errors":{"max_time":1.38,"sim_time":193.697225,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"uart_tl_errors":{"max_time":1.38,"sim_time":193.697225,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"uart_csr_hw_reset":{"max_time":0.62,"sim_time":54.312241,"passed":1,"total":1,"percent":100.0},"uart_csr_rw":{"max_time":0.7,"sim_time":41.427112,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":0.85,"sim_time":25.279548,"passed":1,"total":1,"percent":100.0},"uart_same_csr_outstanding":{"max_time":0.89,"sim_time":119.83444899999999,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"uart_csr_hw_reset":{"max_time":0.62,"sim_time":54.312241,"passed":1,"total":1,"percent":100.0},"uart_csr_rw":{"max_time":0.7,"sim_time":41.427112,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":0.85,"sim_time":25.279548,"passed":1,"total":1,"percent":100.0},"uart_same_csr_outstanding":{"max_time":0.89,"sim_time":119.83444899999999,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":20,"total":22,"percent":90.9090909090909},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"uart_sec_cm":{"max_time":1.17,"sim_time":79.044969,"passed":1,"total":1,"percent":100.0},"uart_tl_intg_err":{"max_time":1.04,"sim_time":211.754942,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"uart_tl_intg_err":{"max_time":1.04,"sim_time":211.754942,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"uart_stress_all_with_rand_reset":{"max_time":3.85,"sim_time":489.159174,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"coverage":{"code":{"block":null,"line_statement":99.17,"branch":97.44,"condition_expression":95.1,"toggle":91.32,"fsm":null},"assertion":97.12,"functional":48.68},"cov_report_page":"/nightly/current_run/scratch/master/uart-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (uart_scoreboard.sv:393) [scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (* [*] vs * [*]) check rx_idle fail: rx_en = *, uart_rx_clk_pulses = *":[{"name":"uart_noise_filter","qual_name":"0.uart_noise_filter.65861425037610924411513099725654041267717508637723810271098092767518334240580","seed":65861425037610924411513099725654041267717508637723810271098092767518334240580,"line":74,"log_path":"/nightly/current_run/scratch/master/uart-sim-vcs/0.uart_noise_filter/latest/run.log","log_context":["UVM_ERROR @  13953446 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @  15153446 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @  16073446 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @  18073446 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n"]},{"name":"uart_stress_all_with_rand_reset","qual_name":"0.uart_stress_all_with_rand_reset.66142419538161928657896001368300736414820916361319436492487049974115483212547","seed":66142419538161928657896001368300736414820916361319436492487049974115483212547,"line":83,"log_path":"/nightly/current_run/scratch/master/uart-sim-vcs/0.uart_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 472212314 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 472507042 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 472885978 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 473264914 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n"]}],"UVM_ERROR (uart_scoreboard.sv:501) scoreboard [scoreboard] rxlvl mismatch exp: * (+/-1), act: *, clk_pulses: *":[{"name":"uart_stress_all","qual_name":"0.uart_stress_all.28443918918868183256076949742578178910787822650511598295939798270644256898227","seed":28443918918868183256076949742578178910787822650511598295939798270644256898227,"line":79,"log_path":"/nightly/current_run/scratch/master/uart-sim-vcs/0.uart_stress_all/latest/run.log","log_context":["UVM_ERROR @ 13523661421 ps: (uart_scoreboard.sv:462) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] unexpected read when fifo is empty\n","UVM_ERROR @ 13523716977 ps: (uart_scoreboard.sv:531) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (123 [0x7b] vs 255 [0xff]) reg name: uart_reg_block.rdata\n","UVM_ERROR @ 14936783837 ps: (uart_scoreboard.sv:501) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] rxlvl mismatch exp: 0 (+/-1), act: 12,                                 clk_pulses: 0\n","UVM_ERROR @ 14936894949 ps: (uart_scoreboard.sv:462) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] unexpected read when fifo is empty\n"]}]}},"passed":24,"total":27,"percent":88.88888888888889}