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_pick_bodysize\n","    assert bodysize is not None\n","           ^^^^^^^^^^^^^^^^^^^^\n","AssertionError\n","ninja: build stopped: subcommand failed.\n","make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:52: pre_run] Error 1\n"]}],"xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_otbn_*/rtl/otbn_rnd.sv,233): Assertion UrndNoReseedOnReset_A has failed":[{"name":"otbn_sec_cm","qual_name":"0.otbn_sec_cm.98796637716170840220079832420487018693185803152914848187106991736423545318446","seed":98796637716170840220079832420487018693185803152914848187106991736423545318446,"line":931,"log_path":"/nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_sec_cm/latest/run.log","log_context":["UVM_ERROR @ 1183933484 ps: (otbn_rnd.sv:233) [ASSERT FAILED] UrndNoReseedOnReset_A\n","UVM_INFO @ 1183933484 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n"]}]}},"passed":39,"total":42,"percent":92.85714285714286}