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visibility to that name\n"]}],"UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*])":[{"name":"spi_device_ram_cfg","qual_name":"0.spi_device_ram_cfg.78439126247069978460481551111995118158251054292385221849334992484123889655004","seed":78439126247069978460481551111995118158251054292385221849334992484123889655004,"line":76,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_ram_cfg/latest/run.log","log_context":["UVM_ERROR @   3655415 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x75c48c [11101011100010010001100] vs 0x0 [0]) \n","UVM_ERROR @   3728415 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x7c1f02 [11111000001111100000010] vs 0x0 [0]) \n","UVM_ERROR @   3793415 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xb8d8f [10111000110110001111] vs 0x0 [0]) \n","UVM_ERROR @   3815415 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x6da499 [11011011010010010011001] vs 0x0 [0]) \n"]}],"UVM_ERROR (spi_device_pass_base_vseq.sv:705) [spi_device_flash_mode_ignore_cmds_vseq] Check failed busy == * (* [*] vs * [*]) flash_status.busy == * expected to be *":[{"name":"spi_device_flash_mode_ignore_cmds","qual_name":"0.spi_device_flash_mode_ignore_cmds.54363266971809761841653658448922039058435280666112745421569103588286673101883","seed":54363266971809761841653658448922039058435280666112745421569103588286673101883,"line":84,"log_path":"/nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_flash_mode_ignore_cmds/latest/run.log","log_context":["UVM_INFO @ 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