{"block":{"name":"i2c","variant":null,"commit":"fa5c0ef535be85c955fc676f5eb427405222261e","commit_short":"fa5c0ef","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/fa5c0ef535be85c955fc676f5eb427405222261e","revision_info":"GitHub Revision: [`fa5c0ef`](https://github.com/lowrisc/opentitan/tree/fa5c0ef535be85c955fc676f5eb427405222261e)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-07-06T15:30:30Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/i2c/data/i2c_testplan.html","stages":{"V1":{"testpoints":{"host_smoke":{"tests":{"i2c_host_smoke":{"max_time":16.13,"sim_time":1557.365544,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_smoke":{"tests":{"i2c_target_smoke":{"max_time":12.16,"sim_time":2887.956716,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"i2c_csr_hw_reset":{"max_time":0.7,"sim_time":24.116584,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"i2c_csr_rw":{"max_time":0.83,"sim_time":70.307943,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"i2c_csr_bit_bash":{"max_time":4.23,"sim_time":2543.842169,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"i2c_csr_aliasing":{"max_time":1.26,"sim_time":28.950243999999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"i2c_csr_mem_rw_with_rand_reset":{"max_time":0.96,"sim_time":21.732208999999997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"i2c_csr_rw":{"max_time":0.83,"sim_time":70.307943,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":1.26,"sim_time":28.950243999999998,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":7,"total":7,"percent":100.0},"V2":{"testpoints":{"host_error_intr":{"tests":{"i2c_host_error_intr":{"max_time":0.78,"sim_time":60.158233,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"host_stress_all":{"tests":{"i2c_host_stress_all":{"max_time":63.86,"sim_time":3555.951751,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"host_maxperf":{"tests":{"i2c_host_perf":{"max_time":2.58,"sim_time":672.65231,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_override":{"tests":{"i2c_host_override":{"max_time":0.96,"sim_time":112.56749400000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_watermark":{"tests":{"i2c_host_fifo_watermark":{"max_time":80.65,"sim_time":5369.076639999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_overflow":{"tests":{"i2c_host_fifo_overflow":{"max_time":61.339999999999996,"sim_time":6968.767189,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_reset":{"tests":{"i2c_host_fifo_reset_fmt":{"max_time":1.0,"sim_time":212.568828,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_fmt_empty":{"max_time":9.87,"sim_time":646.209352,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_reset_rx":{"max_time":4.47,"sim_time":233.490371,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"host_fifo_full":{"tests":{"i2c_host_fifo_full":{"max_time":41.12,"sim_time":2576.524982,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_timeout":{"tests":{"i2c_host_stretch_timeout":{"max_time":32.98,"sim_time":4099.563744,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"i2c_host_mode_toggle":{"tests":{"i2c_host_mode_toggle":{"max_time":2.59,"sim_time":102.24656900000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_glitch":{"tests":{"i2c_target_glitch":{"max_time":1.66,"sim_time":827.9300139999999,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_stress_all":{"tests":{"i2c_target_stress_all":{"max_time":20.46,"sim_time":12041.461403000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_maxperf":{"tests":{"i2c_target_perf":{"max_time":3.59,"sim_time":804.292542,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_fifo_empty":{"tests":{"i2c_target_stress_rd":{"max_time":17.33,"sim_time":4227.468482,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_smoke":{"max_time":4.53,"sim_time":3525.8875559999997,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"target_fifo_reset":{"tests":{"i2c_target_fifo_reset_acq":{"max_time":2.03,"sim_time":249.533367,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_reset_tx":{"max_time":1.1,"sim_time":205.628763,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"target_fifo_full":{"tests":{"i2c_target_stress_wr":{"max_time":3.78,"sim_time":10243.991125,"passed":1,"total":1,"percent":100.0},"i2c_target_stress_rd":{"max_time":17.33,"sim_time":4227.468482,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_stress_wr":{"max_time":2.53,"sim_time":9340.391423000001,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"target_timeout":{"tests":{"i2c_target_timeout":{"max_time":3.83,"sim_time":4365.019416,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_clock_stretch":{"tests":{"i2c_target_stretch":{"max_time":12.54,"sim_time":1528.3906829999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"bad_address":{"tests":{"i2c_target_bad_addr":{"max_time":3.53,"sim_time":4568.648276999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_glitch":{"tests":{"i2c_target_hrst":{"max_time":2.29,"sim_time":1385.8332409999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_fifo_watermark":{"tests":{"i2c_target_fifo_watermarks_acq":{"max_time":1.55,"sim_time":232.40263099999999,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_watermarks_tx":{"max_time":1.16,"sim_time":318.61863900000003,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"host_mode_config_perf":{"tests":{"i2c_host_perf":{"max_time":2.58,"sim_time":672.65231,"passed":1,"total":1,"percent":100.0},"i2c_host_perf_precise":{"max_time":3.05,"sim_time":1001.3374349999999,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"host_mode_clock_stretching":{"tests":{"i2c_host_stretch_timeout":{"max_time":32.98,"sim_time":4099.563744,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_tx_stretch_ctrl":{"tests":{"i2c_target_tx_stretch_ctrl":{"max_time":1.26,"sim_time":75.169275,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_nack_generation":{"tests":{"i2c_target_nack_acqfull":{"max_time":1.84,"sim_time":2802.592935,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_acqfull_addr":{"max_time":2.23,"sim_time":541.70397,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_txstretch":{"max_time":1.15,"sim_time":248.99608600000002,"passed":0,"total":1,"percent":0.0}},"passed":2,"total":3,"percent":66.66666666666667},"host_mode_halt_on_nak":{"tests":{"i2c_host_may_nack":{"max_time":7.91,"sim_time":375.505116,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_smbus_maxlen":{"tests":{"i2c_target_smbus_maxlen":{"max_time":2.43,"sim_time":7513.724990000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"i2c_alert_test":{"max_time":0.74,"sim_time":26.396269,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"i2c_intr_test":{"max_time":0.82,"sim_time":36.424437,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"i2c_tl_errors":{"max_time":2.38,"sim_time":147.109325,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"i2c_tl_errors":{"max_time":2.38,"sim_time":147.109325,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"i2c_csr_hw_reset":{"max_time":0.7,"sim_time":24.116584,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":0.83,"sim_time":70.307943,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":1.26,"sim_time":28.950243999999998,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":1.22,"sim_time":155.56503,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"i2c_csr_hw_reset":{"max_time":0.7,"sim_time":24.116584,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":0.83,"sim_time":70.307943,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":1.26,"sim_time":28.950243999999998,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":1.22,"sim_time":155.56503,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":37,"total":41,"percent":90.2439024390244},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"i2c_tl_intg_err":{"max_time":1.52,"sim_time":297.246945,"passed":1,"total":1,"percent":100.0},"i2c_sec_cm":{"max_time":1.21,"sim_time":47.430658,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"i2c_tl_intg_err":{"max_time":1.52,"sim_time":297.246945,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"V3":{"testpoints":{"host_stress_all_with_rand_reset":{"tests":{"i2c_host_stress_all_with_rand_reset":{"max_time":2.86,"sim_time":305.640501,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_error_intr":{"tests":{"i2c_target_unexp_stop":{"max_time":1.06,"sim_time":67.55334699999999,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_stress_all_with_rand_reset":{"tests":{"i2c_target_stress_all_with_rand_reset":{"max_time":21.46,"sim_time":13903.906781,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":3,"percent":0.0}},"coverage":{"code":{"block":null,"line_statement":95.95,"branch":91.63,"condition_expression":85.12,"toggle":89.66,"fsm":42.26},"assertion":97.67,"functional":80.97},"cov_report_page":"/nightly/current_run/scratch/master/i2c-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between":[{"name":"i2c_host_error_intr","qual_name":"0.i2c_host_error_intr.91874986897366968041522898762137422178258196734986305037261867672530712421554","seed":91874986897366968041522898762137422178258196734986305037261867672530712421554,"line":80,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log","log_context":["UVM_INFO @  60158233 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"i2c_host_stress_all","qual_name":"0.i2c_host_stress_all.79000946841133621595597608363783052570801194433185802767161365814651054714719","seed":79000946841133621595597608363783052570801194433185802767161365814651054714719,"line":91,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log","log_context":["UVM_INFO @ 3555951751 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between":[{"name":"i2c_target_glitch","qual_name":"0.i2c_target_glitch.38370003735349653128484766896276813836283354653334327136433552761279274666343","seed":38370003735349653128484766896276813836283354653334327136433552761279274666343,"line":84,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log","log_context":["UVM_INFO @ 827930014 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*])":[{"name":"i2c_target_unexp_stop","qual_name":"0.i2c_target_unexp_stop.21647199602533156325660851656617304640053095474771019683317566107326209571124","seed":21647199602533156325660851656617304640053095474771019683317566107326209571124,"line":78,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log","log_context":["UVM_INFO @  67553347 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1286) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"i2c_host_stress_all_with_rand_reset","qual_name":"0.i2c_host_stress_all_with_rand_reset.90749608189529661384637271311892726459497421420526061006087710300383231628204","seed":90749608189529661384637271311892726459497421420526061006087710300383231628204,"line":86,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 305640501 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"i2c_target_stress_all_with_rand_reset","qual_name":"0.i2c_target_stress_all_with_rand_reset.19652207494093572765387368810922725223944409540552464955927597036501242504904","seed":19652207494093572765387368810922725223944409540552464955927597036501242504904,"line":95,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 13903906781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: *":[{"name":"i2c_target_nack_txstretch","qual_name":"0.i2c_target_nack_txstretch.88783301930966628650850907922854552119120624916144166857427630166700339905545","seed":88783301930966628650850907922854552119120624916144166857427630166700339905545,"line":78,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_nack_txstretch/latest/run.log","log_context":["UVM_INFO @ 248996086 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":43,"total":50,"percent":86.0}