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ert_test":{"tests":{"uart_alert_test":{"max_time":0.58,"sim_time":13.031683999999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"uart_intr_test":{"max_time":0.65,"sim_time":39.786894000000004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"uart_tl_errors":{"max_time":1.18,"sim_time":195.504073,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"uart_tl_errors":{"max_time":1.18,"sim_time":195.504073,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"uart_csr_hw_reset":{"max_time":0.62,"sim_time":122.040907,"passed":1,"total":1,"percent":100.0},"uart_csr_rw":{"max_time":0.59,"sim_time":15.831503000000001,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":0.76,"sim_time":41.878048,"passed":1,"total":1,"percent":100.0},"uart_same_csr_outstanding":{"max_time":0.91,"sim_time":43.864182,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"uart_csr_hw_reset":{"max_time":0.62,"sim_time":122.040907,"passed":1,"total":1,"percent":100.0},"uart_csr_rw":{"max_time":0.59,"sim_time":15.831503000000001,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":0.76,"sim_time":41.878048,"passed":1,"total":1,"percent":100.0},"uart_same_csr_outstanding":{"max_time":0.91,"sim_time":43.864182,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":21,"total":22,"percent":95.45454545454545},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"uart_sec_cm":{"max_time":0.87,"sim_time":88.855109,"passed":1,"total":1,"percent":100.0},"uart_tl_intg_err":{"max_time":1.37,"sim_time":102.835706,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"uart_tl_intg_err":{"max_time":1.37,"sim_time":102.835706,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"uart_stress_all_with_rand_reset":{"max_time":18.53,"sim_time":3575.8025580000003,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"coverage":{"code":{"block":null,"line_statement":99.17,"branch":97.2,"condition_expression":96.73,"toggle":74.12,"fsm":null},"assertion":98.27,"functional":57.31},"cov_report_page":"/nightly/current_run/scratch/master/uart-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (uart_scoreboard.sv:393) [scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (* [*] vs * [*]) check rx_idle fail: rx_en = *, uart_rx_clk_pulses = *":[{"name":"uart_noise_filter","qual_name":"0.uart_noise_filter.902182294153525296585879526295166960208177317651146188834177348738192626553","seed":902182294153525296585879526295166960208177317651146188834177348738192626553,"line":80,"log_path":"/nightly/current_run/scratch/master/uart-sim-vcs/0.uart_noise_filter/latest/run.log","log_context":["UVM_ERROR @ 58477416358 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 58479475198 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 58480122262 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 58481357566 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n"]},{"name":"uart_stress_all_with_rand_reset","qual_name":"0.uart_stress_all_with_rand_reset.10445710783419453391881885518710017497068053259406011067492841449726355593184","seed":10445710783419453391881885518710017497068053259406011067492841449726355593184,"line":140,"log_path":"/nightly/current_run/scratch/master/uart-sim-vcs/0.uart_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 3529719962 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 3530553282 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 3531386602 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 3532219922 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n"]}]}},"passed":25,"total":27,"percent":92.5925925925926}