{"block":{"name":"sram_ctrl","variant":"ret","commit":"189b2b0553e8e999fa698a75b83a61150966a663","commit_short":"189b2b0","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/189b2b0553e8e999fa698a75b83a61150966a663","revision_info":"GitHub Revision: [`189b2b0`](https://github.com/lowrisc/opentitan/tree/189b2b0553e8e999fa698a75b83a61150966a663)"},"tool":{"name":"xcelium","version":"unknown"},"timestamp":"2026-07-15T15:30:26Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/sram_ctrl_ret/data/sram_ctrl_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"sram_ctrl_smoke":{"max_time":2.0,"sim_time":105.77361900000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":2.0,"sim_time":53.496569,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"sram_ctrl_csr_rw":{"max_time":1.0,"sim_time":67.326141,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"sram_ctrl_csr_bit_bash":{"max_time":2.0,"sim_time":65.121838,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":17.145613,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"sram_ctrl_csr_mem_rw_with_rand_reset":{"max_time":1.0,"sim_time":58.543644,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"sram_ctrl_csr_rw":{"max_time":1.0,"sim_time":67.326141,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":17.145613,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"mem_walk":{"tests":{"sram_ctrl_mem_walk":{"max_time":8.0,"sim_time":773.8296,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"mem_partial_access":{"tests":{"sram_ctrl_mem_partial_access":{"max_time":3.0,"sim_time":214.81781400000003,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":8,"total":8,"percent":100.0},"V2":{"testpoints":{"multiple_keys":{"tests":{"sram_ctrl_multiple_keys":{"max_time":8.0,"sim_time":620.525642,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_pipeline":{"tests":{"sram_ctrl_stress_pipeline":{"max_time":172.0,"sim_time":12812.394191,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"bijection":{"tests":{"sram_ctrl_bijection":{"max_time":5.0,"sim_time":1287.840294,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"access_during_key_req":{"tests":{"sram_ctrl_access_during_key_req":{"max_time":14.0,"sim_time":632.166252,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"lc_escalation":{"tests":{"sram_ctrl_lc_escalation":{"max_time":3.0,"sim_time":2996.9509500000004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"executable":{"tests":{"sram_ctrl_executable":{"max_time":12.0,"sim_time":3929.992968,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"partial_access":{"tests":{"sram_ctrl_partial_access":{"max_time":2.0,"sim_time":52.03972,"passed":1,"total":1,"percent":100.0},"sram_ctrl_partial_access_b2b":{"max_time":181.0,"sim_time":20910.494675,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"max_throughput":{"tests":{"sram_ctrl_max_throughput":{"max_time":1.0,"sim_time":180.116321,"passed":0,"total":1,"percent":0.0},"sram_ctrl_throughput_w_partial_write":{"max_time":2.0,"sim_time":77.117974,"passed":0,"total":1,"percent":0.0},"sram_ctrl_throughput_w_readback":{"max_time":2.0,"sim_time":34.885739,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":3,"percent":0.0},"regwen":{"tests":{"sram_ctrl_regwen":{"max_time":6.0,"sim_time":189.33937899999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"ram_cfg":{"tests":{"sram_ctrl_ram_cfg":{"max_time":1.0,"sim_time":34.812915999999994,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_all":{"tests":{"sram_ctrl_stress_all":{"max_time":40.0,"sim_time":12190.024601,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"sram_ctrl_alert_test":{"max_time":1.0,"sim_time":16.641127,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"sram_ctrl_tl_errors":{"max_time":3.0,"sim_time":189.12175200000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"sram_ctrl_tl_errors":{"max_time":3.0,"sim_time":189.12175200000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":2.0,"sim_time":53.496569,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_rw":{"max_time":1.0,"sim_time":67.326141,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":17.145613,"passed":1,"total":1,"percent":100.0},"sram_ctrl_same_csr_outstanding":{"max_time":1.0,"sim_time":86.114449,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"sram_ctrl_csr_hw_reset":{"max_time":2.0,"sim_time":53.496569,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_rw":{"max_time":1.0,"sim_time":67.326141,"passed":1,"total":1,"percent":100.0},"sram_ctrl_csr_aliasing":{"max_time":1.0,"sim_time":17.145613,"passed":1,"total":1,"percent":100.0},"sram_ctrl_same_csr_outstanding":{"max_time":1.0,"sim_time":86.114449,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":17,"total":20,"percent":85.0},"V2S":{"testpoints":{"passthru_mem_tl_intg_err":{"tests":{"sram_ctrl_passthru_mem_tl_intg_err":{"max_time":3.0,"sim_time":216.746833,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_intg_err":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":311.22535899999997,"passed":1,"total":1,"percent":100.0},"sram_ctrl_tl_intg_err":{"max_time":2.0,"sim_time":303.608251,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"prim_count_check":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":311.22535899999997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"sram_ctrl_tl_intg_err":{"max_time":2.0,"sim_time":303.608251,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_ctrl_config_regwen":{"tests":{"sram_ctrl_regwen":{"max_time":6.0,"sim_time":189.33937899999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_readback_config_regwen":{"tests":{"sram_ctrl_regwen":{"max_time":6.0,"sim_time":189.33937899999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_exec_config_regwen":{"tests":{"sram_ctrl_csr_rw":{"max_time":1.0,"sim_time":67.326141,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_exec_config_mubi":{"tests":{"sram_ctrl_executable":{"max_time":12.0,"sim_time":3929.992968,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_exec_intersig_mubi":{"tests":{"sram_ctrl_executable":{"max_time":12.0,"sim_time":3929.992968,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_lc_hw_debug_en_intersig_mubi":{"tests":{"sram_ctrl_executable":{"max_time":12.0,"sim_time":3929.992968,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_lc_escalate_en_intersig_mubi":{"tests":{"sram_ctrl_lc_escalation":{"max_time":3.0,"sim_time":2996.9509500000004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_prim_ram_ctrl_mubi":{"tests":{"sram_ctrl_mubi_enc_err":{"max_time":2.0,"sim_time":466.894066,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_mem_integrity":{"tests":{"sram_ctrl_passthru_mem_tl_intg_err":{"max_time":3.0,"sim_time":216.746833,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_mem_readback":{"tests":{"sram_ctrl_readback_err":{"max_time":2.0,"sim_time":115.774986,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_mem_scramble":{"tests":{"sram_ctrl_smoke":{"max_time":2.0,"sim_time":105.77361900000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_addr_scramble":{"tests":{"sram_ctrl_smoke":{"max_time":2.0,"sim_time":105.77361900000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_instr_bus_lc_gated":{"tests":{"sram_ctrl_executable":{"max_time":12.0,"sim_time":3929.992968,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_ram_tl_lc_gate_fsm_sparse":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":311.22535899999997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_key_global_esc":{"tests":{"sram_ctrl_lc_escalation":{"max_time":3.0,"sim_time":2996.9509500000004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_key_local_esc":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":311.22535899999997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_init_ctr_redun":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":311.22535899999997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_scramble_key_sideload":{"tests":{"sram_ctrl_smoke":{"max_time":2.0,"sim_time":105.77361900000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sec_cm_tlul_fifo_ctr_redun":{"tests":{"sram_ctrl_sec_cm":{"max_time":2.0,"sim_time":311.22535899999997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":10,"total":10,"percent":100.0},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"sram_ctrl_stress_all_with_rand_reset":{"max_time":30.0,"sim_time":15842.834423,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"coverage":{"code":{"block":93.69,"line_statement":94.91,"branch":89.36,"condition_expression":null,"toggle":78.08,"fsm":66.67},"assertion":97.26,"functional":93.2},"cov_report_page":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/cov_report/index.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (sram_ctrl_throughput_vseq.sv:66) [sram_ctrl_throughput_vseq] Check failed num_cycles == num_ops + * + num_partial_write * * (* [*] vs * [*])":[{"name":"sram_ctrl_max_throughput","qual_name":"0.sram_ctrl_max_throughput.95960268673416981126259986289776043589691432423842542553026869770429144726347","seed":95960268673416981126259986289776043589691432423842542553026869770429144726347,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/0.sram_ctrl_max_throughput/latest/run.log","log_context":["UVM_INFO @ 180116321 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]},{"name":"sram_ctrl_throughput_w_partial_write","qual_name":"0.sram_ctrl_throughput_w_partial_write.51433664987990100285455140988583133326239000268476729777017870440878107453833","seed":51433664987990100285455140988583133326239000268476729777017870440878107453833,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/0.sram_ctrl_throughput_w_partial_write/latest/run.log","log_context":["UVM_INFO @  77117974 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (sram_ctrl_throughput_vseq.sv:64) [sram_ctrl_throughput_vseq] Check failed num_cycles == num_writes * * + num_reads * * - last_was_write (* [*] vs * [*])":[{"name":"sram_ctrl_throughput_w_readback","qual_name":"0.sram_ctrl_throughput_w_readback.36621968746567666252992857491394617735357030196423312618227061309288187754613","seed":36621968746567666252992857491394617735357030196423312618227061309288187754613,"line":86,"log_path":"/nightly/current_run/scratch/master/sram_ctrl_ret-sim-xcelium/0.sram_ctrl_throughput_w_readback/latest/run.log","log_context":["UVM_INFO @  34885739 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":28,"total":31,"percent":90.3225806451613}