{"block":{"name":"uart","variant":null,"commit":"189b2b0553e8e999fa698a75b83a61150966a663","commit_short":"189b2b0","branch":"master","url":"https://github.com/lowRISC/opentitan/tree/189b2b0553e8e999fa698a75b83a61150966a663","revision_info":"GitHub Revision: [`189b2b0`](https://github.com/lowrisc/opentitan/tree/189b2b0553e8e999fa698a75b83a61150966a663)"},"tool":{"name":"vcs","version":"unknown"},"timestamp":"2026-07-15T15:30:26Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/uart/data/uart_testplan.html","stages":{"V1":{"testpoints":{"smoke":{"tests":{"uart_smoke":{"max_time":8.59,"sim_time":5800.148639999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"uart_csr_hw_reset":{"max_time":0.66,"sim_time":49.274457999999996,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"uart_csr_rw":{"max_time":0.66,"sim_time":30.240465,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"uart_csr_bit_bash":{"max_time":1.38,"sim_time":84.441137,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"uart_csr_aliasing":{"max_time":0.9,"sim_time":35.307195,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"uart_csr_mem_rw_with_rand_reset":{"max_time":0.9,"sim_time":264.600894,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"uart_csr_rw":{"max_time":0.66,"sim_time":30.240465,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":0.9,"sim_time":35.307195,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":6,"total":6,"percent":100.0},"V2":{"testpoints":{"base_random_seq":{"tests":{"uart_tx_rx":{"max_time":203.48,"sim_time":56827.81484399999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"parity":{"tests":{"uart_smoke":{"max_time":8.59,"sim_time":5800.148639999999,"passed":1,"total":1,"percent":100.0},"uart_tx_rx":{"max_time":203.48,"sim_time":56827.81484399999,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"parity_error":{"tests":{"uart_intr":{"max_time":9.86,"sim_time":19923.829761,"passed":1,"total":1,"percent":100.0},"uart_rx_parity_err":{"max_time":109.95,"sim_time":131775.37913,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"watermark":{"tests":{"uart_tx_rx":{"max_time":203.48,"sim_time":56827.81484399999,"passed":1,"total":1,"percent":100.0},"uart_intr":{"max_time":9.86,"sim_time":19923.829761,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"fifo_full":{"tests":{"uart_fifo_full":{"max_time":26.1,"sim_time":31597.762575,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"fifo_overflow":{"tests":{"uart_fifo_overflow":{"max_time":42.29,"sim_time":237565.584229,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"fifo_reset":{"tests":{"uart_fifo_reset":{"max_time":11.69,"sim_time":12697.207075999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_frame_err":{"tests":{"uart_intr":{"max_time":9.86,"sim_time":19923.829761,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_break_err":{"tests":{"uart_intr":{"max_time":9.86,"sim_time":19923.829761,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_timeout":{"tests":{"uart_intr":{"max_time":9.86,"sim_time":19923.829761,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"perf":{"tests":{"uart_perf":{"max_time":131.34,"sim_time":5003.453321999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"sys_loopback":{"tests":{"uart_loopback":{"max_time":12.17,"sim_time":12288.397543,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"line_loopback":{"tests":{"uart_loopback":{"max_time":12.17,"sim_time":12288.397543,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_noise_filter":{"tests":{"uart_noise_filter":{"max_time":8.95,"sim_time":6356.966212,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"rx_start_bit_filter":{"tests":{"uart_rx_start_bit_filter":{"max_time":26.99,"sim_time":35587.720014,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tx_overide":{"tests":{"uart_tx_ovrd":{"max_time":17.7,"sim_time":6353.3901399999995,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"rx_oversample":{"tests":{"uart_rx_oversample":{"max_time":3.24,"sim_time":1489.2682320000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"long_b2b_transfer":{"tests":{"uart_long_xfer_wo_dly":{"max_time":430.51,"sim_time":130314.32486399998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"stress_all":{"tests":{"uart_stress_all":{"max_time":12.75,"sim_time":12763.670586999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"uart_alert_test":{"max_time":0.66,"sim_time":11.778452,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"uart_intr_test":{"max_time":0.68,"sim_time":14.441404,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"uart_tl_errors":{"max_time":1.6,"sim_time":107.169219,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"uart_tl_errors":{"max_time":1.6,"sim_time":107.169219,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"uart_csr_hw_reset":{"max_time":0.66,"sim_time":49.274457999999996,"passed":1,"total":1,"percent":100.0},"uart_csr_rw":{"max_time":0.66,"sim_time":30.240465,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":0.9,"sim_time":35.307195,"passed":1,"total":1,"percent":100.0},"uart_same_csr_outstanding":{"max_time":0.86,"sim_time":34.029591999999994,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"uart_csr_hw_reset":{"max_time":0.66,"sim_time":49.274457999999996,"passed":1,"total":1,"percent":100.0},"uart_csr_rw":{"max_time":0.66,"sim_time":30.240465,"passed":1,"total":1,"percent":100.0},"uart_csr_aliasing":{"max_time":0.9,"sim_time":35.307195,"passed":1,"total":1,"percent":100.0},"uart_same_csr_outstanding":{"max_time":0.86,"sim_time":34.029591999999994,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":21,"total":22,"percent":95.45454545454545},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"uart_sec_cm":{"max_time":0.84,"sim_time":71.276152,"passed":1,"total":1,"percent":100.0},"uart_tl_intg_err":{"max_time":0.83,"sim_time":181.336921,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"uart_tl_intg_err":{"max_time":0.83,"sim_time":181.336921,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"V3":{"testpoints":{"stress_all_with_rand_reset":{"tests":{"uart_stress_all_with_rand_reset":{"max_time":28.66,"sim_time":7175.222297,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"coverage":{"code":{"block":null,"line_statement":99.17,"branch":97.44,"condition_expression":94.75,"toggle":74.67,"fsm":null},"assertion":98.85,"functional":44.84},"cov_report_page":"/nightly/current_run/scratch/master/uart-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR (uart_scoreboard.sv:393) [scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (* [*] vs * [*]) check rx_idle fail: rx_en = *, uart_rx_clk_pulses = *":[{"name":"uart_noise_filter","qual_name":"0.uart_noise_filter.31958205185881827636432604657676861802381760890630242147875645586578511659265","seed":31958205185881827636432604657676861802381760890630242147875645586578511659265,"line":77,"log_path":"/nightly/current_run/scratch/master/uart-sim-vcs/0.uart_noise_filter/latest/run.log","log_context":["UVM_ERROR @ 5538566212 ps: (uart_scoreboard.sv:377) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxempty, item.d_data) == rx_empty_exp (0 [0x0] vs 1 [0x1]) check rx_empty fail: uart_rx_clk_pulses = 0, rx_q.size = 0\n","UVM_ERROR @ 5538566212 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n","UVM_ERROR @ 5538646212 ps: (uart_scoreboard.sv:377) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxempty, item.d_data) == rx_empty_exp (0 [0x0] vs 1 [0x1]) check rx_empty fail: uart_rx_clk_pulses = 0, rx_q.size = 0\n","UVM_ERROR @ 5538646212 ps: (uart_scoreboard.sv:393) [uvm_test_top.env.scoreboard] Check failed get_field_val(ral.status.rxidle, item.d_data) == rx_idle_exp (0 [0x0] vs 1 [0x1]) check rx_idle fail: rx_en = 1, uart_rx_clk_pulses = 0\n"]},{"name":"uart_stress_all_with_rand_reset","qual_name":"0.uart_stress_all_with_rand_reset.6365800845972621030970191495669507500975193512895845267856257545843147779268","seed":6365800845972621030970191495669507500975193512895845267856257545843147779268,"line":164,"log_path":"/nightly/current_run/scratch/master/uart-sim-vcs/0.uart_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_ERROR @ 4808510165 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (0 [0x0] vs 1 [0x1]) Regname: uart_reg_block.status.rxidle reset value: 0x1 \n","UVM_INFO @ 4825568129 ps: (cip_base_vseq.sv:1203) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.uart_common_vseq] \n","Issuing reset for run 8/10\n","UVM_INFO @ 4825651461 ps: (cip_base_vseq.sv:1223) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.uart_common_vseq] \n"]}]}},"passed":25,"total":27,"percent":92.5925925925926}