{"block":{"name":"i2c","variant":null,"commit":"31e43cb13b72d2548f3e9cca015a4990c04ba25a","commit_short":"31e43cb","dirty":false,"branch":"master","url":"https://github.com/lowRISC/opentitan/tree/31e43cb13b72d2548f3e9cca015a4990c04ba25a","revision_info":"GitHub Revision: [`31e43cb`](https://github.com/lowrisc/opentitan/tree/31e43cb13b72d2548f3e9cca015a4990c04ba25a)"},"tool":{"name":"vcs","version":"X-2025.06-SP2-1_Full64"},"timestamp":"2026-08-26T15:30:29Z","build_seed":null,"testplan_ref":"https://opentitan.org/book/hw/ip/i2c/data/i2c_testplan.html","stages":{"V1":{"testpoints":{"host_smoke":{"tests":{"i2c_host_smoke":{"max_time":15.77,"sim_time":28807.728783,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_smoke":{"tests":{"i2c_target_smoke":{"max_time":10.06,"sim_time":4101.65222,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_hw_reset":{"tests":{"i2c_csr_hw_reset":{"max_time":0.96,"sim_time":42.181004,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_rw":{"tests":{"i2c_csr_rw":{"max_time":0.97,"sim_time":88.19585400000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_bit_bash":{"tests":{"i2c_csr_bit_bash":{"max_time":3.27,"sim_time":558.268409,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_aliasing":{"tests":{"i2c_csr_aliasing":{"max_time":1.05,"sim_time":22.205132000000003,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"csr_mem_rw_with_rand_reset":{"tests":{"i2c_csr_mem_rw_with_rand_reset":{"max_time":1.17,"sim_time":129.836065,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"regwen_csr_and_corresponding_lockable_csr":{"tests":{"i2c_csr_rw":{"max_time":0.97,"sim_time":88.19585400000001,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":1.05,"sim_time":22.205132000000003,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0}},"passed":7,"total":7,"percent":100.0},"V2":{"testpoints":{"host_error_intr":{"tests":{"i2c_host_error_intr":{"max_time":1.97,"sim_time":120.324691,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_stress_all":{"tests":{"i2c_host_stress_all":{"max_time":358.0,"sim_time":24864.744133,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_maxperf":{"tests":{"i2c_host_perf":{"max_time":13.81,"sim_time":13502.047868000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_override":{"tests":{"i2c_host_override":{"max_time":1.0,"sim_time":17.071977999999998,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_watermark":{"tests":{"i2c_host_fifo_watermark":{"max_time":60.17999999999999,"sim_time":13384.231241,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_overflow":{"tests":{"i2c_host_fifo_overflow":{"max_time":65.92,"sim_time":2734.5273629999997,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_fifo_reset":{"tests":{"i2c_host_fifo_reset_fmt":{"max_time":1.19,"sim_time":126.190807,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_fmt_empty":{"max_time":8.83,"sim_time":997.479509,"passed":1,"total":1,"percent":100.0},"i2c_host_fifo_reset_rx":{"max_time":11.36,"sim_time":980.858759,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"host_fifo_full":{"tests":{"i2c_host_fifo_full":{"max_time":59.15,"sim_time":4028.4269630000003,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"host_timeout":{"tests":{"i2c_host_stretch_timeout":{"max_time":10.39,"sim_time":1224.4111950000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"i2c_host_mode_toggle":{"tests":{"i2c_host_mode_toggle":{"max_time":2.46,"sim_time":255.939592,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_glitch":{"tests":{"i2c_target_glitch":{"max_time":2.15,"sim_time":9167.821155,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_stress_all":{"tests":{"i2c_target_stress_all":{"max_time":49.5,"sim_time":39452.197488,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_maxperf":{"tests":{"i2c_target_perf":{"max_time":4.56,"sim_time":1075.1227430000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_fifo_empty":{"tests":{"i2c_target_stress_rd":{"max_time":7.32,"sim_time":697.935671,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_smoke":{"max_time":6.14,"sim_time":1686.323718,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"target_fifo_reset":{"tests":{"i2c_target_fifo_reset_acq":{"max_time":2.01,"sim_time":202.504839,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_reset_tx":{"max_time":1.86,"sim_time":458.68088,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"target_fifo_full":{"tests":{"i2c_target_stress_wr":{"max_time":144.99,"sim_time":55177.029232,"passed":1,"total":1,"percent":100.0},"i2c_target_stress_rd":{"max_time":7.32,"sim_time":697.935671,"passed":1,"total":1,"percent":100.0},"i2c_target_intr_stress_wr":{"max_time":202.44,"sim_time":18885.37572,"passed":1,"total":1,"percent":100.0}},"passed":3,"total":3,"percent":100.0},"target_timeout":{"tests":{"i2c_target_timeout":{"max_time":5.96,"sim_time":1688.737038,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_clock_stretch":{"tests":{"i2c_target_stretch":{"max_time":6.83,"sim_time":10027.327502,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"bad_address":{"tests":{"i2c_target_bad_addr":{"max_time":4.71,"sim_time":962.386204,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_glitch":{"tests":{"i2c_target_hrst":{"max_time":2.07,"sim_time":660.720595,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_fifo_watermark":{"tests":{"i2c_target_fifo_watermarks_acq":{"max_time":1.22,"sim_time":177.310693,"passed":1,"total":1,"percent":100.0},"i2c_target_fifo_watermarks_tx":{"max_time":1.87,"sim_time":341.341387,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"host_mode_config_perf":{"tests":{"i2c_host_perf":{"max_time":13.81,"sim_time":13502.047868000001,"passed":1,"total":1,"percent":100.0},"i2c_host_perf_precise":{"max_time":5.18,"sim_time":733.485691,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"host_mode_clock_stretching":{"tests":{"i2c_host_stretch_timeout":{"max_time":10.39,"sim_time":1224.4111950000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_tx_stretch_ctrl":{"tests":{"i2c_target_tx_stretch_ctrl":{"max_time":0.97,"sim_time":3.381522,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_mode_nack_generation":{"tests":{"i2c_target_nack_acqfull":{"max_time":3.2,"sim_time":5149.98377,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_acqfull_addr":{"max_time":2.18,"sim_time":450.995402,"passed":1,"total":1,"percent":100.0},"i2c_target_nack_txstretch":{"max_time":1.61,"sim_time":127.16767,"passed":0,"total":1,"percent":0.0}},"passed":2,"total":3,"percent":66.66666666666667},"host_mode_halt_on_nak":{"tests":{"i2c_host_may_nack":{"max_time":7.11,"sim_time":770.774901,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"target_mode_smbus_maxlen":{"tests":{"i2c_target_smbus_maxlen":{"max_time":1.98,"sim_time":855.9244570000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"alert_test":{"tests":{"i2c_alert_test":{"max_time":0.97,"sim_time":50.639108,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"intr_test":{"tests":{"i2c_intr_test":{"max_time":0.96,"sim_time":16.832235,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_oob_addr_access":{"tests":{"i2c_tl_errors":{"max_time":2.4,"sim_time":116.72076700000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_illegal_access":{"tests":{"i2c_tl_errors":{"max_time":2.4,"sim_time":116.72076700000001,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0},"tl_d_outstanding_access":{"tests":{"i2c_csr_hw_reset":{"max_time":0.96,"sim_time":42.181004,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":0.97,"sim_time":88.19585400000001,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":1.05,"sim_time":22.205132000000003,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":1.1,"sim_time":201.13714499999998,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0},"tl_d_partial_access":{"tests":{"i2c_csr_hw_reset":{"max_time":0.96,"sim_time":42.181004,"passed":1,"total":1,"percent":100.0},"i2c_csr_rw":{"max_time":0.97,"sim_time":88.19585400000001,"passed":1,"total":1,"percent":100.0},"i2c_csr_aliasing":{"max_time":1.05,"sim_time":22.205132000000003,"passed":1,"total":1,"percent":100.0},"i2c_same_csr_outstanding":{"max_time":1.1,"sim_time":201.13714499999998,"passed":1,"total":1,"percent":100.0}},"passed":4,"total":4,"percent":100.0}},"passed":37,"total":41,"percent":90.2439024390244},"V2S":{"testpoints":{"tl_intg_err":{"tests":{"i2c_tl_intg_err":{"max_time":1.58,"sim_time":101.54591099999999,"passed":1,"total":1,"percent":100.0},"i2c_sec_cm":{"max_time":1.16,"sim_time":49.143662,"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"sec_cm_bus_integrity":{"tests":{"i2c_tl_intg_err":{"max_time":1.58,"sim_time":101.54591099999999,"passed":1,"total":1,"percent":100.0}},"passed":1,"total":1,"percent":100.0}},"passed":2,"total":2,"percent":100.0},"V3":{"testpoints":{"host_stress_all_with_rand_reset":{"tests":{"i2c_host_stress_all_with_rand_reset":{"max_time":22.34,"sim_time":743.9916609999999,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_error_intr":{"tests":{"i2c_target_unexp_stop":{"max_time":1.04,"sim_time":503.063977,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0},"target_stress_all_with_rand_reset":{"tests":{"i2c_target_stress_all_with_rand_reset":{"max_time":9.43,"sim_time":910.30214,"passed":0,"total":1,"percent":0.0}},"passed":0,"total":1,"percent":0.0}},"passed":0,"total":3,"percent":0.0}},"coverage":{"code":{"block":null,"line_statement":96.75,"branch":92.69,"condition_expression":85.57,"toggle":74.04,"fsm":45.24},"assertion":96.19,"functional":82.14},"cov_report_page":"/nightly/current_run/scratch/master/i2c-sim-vcs/cov_report/dashboard.html","vplan_report_page":null,"vplan_coverage":null,"failed_jobs":{"buckets":{"UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between":[{"name":"i2c_target_glitch","qual_name":"0.i2c_target_glitch.4922182447810465058684143054682847597010425072959712809077510705833926602498","seed":4922182447810465058684143054682847597010425072959712809077510705833926602498,"line":90,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log","log_context":["UVM_INFO @ 9167821155 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!":[{"name":"i2c_target_stretch","qual_name":"0.i2c_target_stretch.111250651676465549217022804051149760121103208846131904216392614595642793201340","seed":111250651676465549217022804051149760121103208846131904216392614595642793201340,"line":84,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stretch/latest/run.log","log_context":["UVM_INFO @ 10027327502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (i2c_scoreboard.sv:680) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*])":[{"name":"i2c_target_unexp_stop","qual_name":"0.i2c_target_unexp_stop.25884314219990695314695859816967310202383292721050331958729102770424473744609","seed":25884314219990695314695859816967310202383292721050331958729102770424473744609,"line":84,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log","log_context":["UVM_INFO @ 503063977 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR (cip_base_vseq.sv:1296) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses.":[{"name":"i2c_host_stress_all_with_rand_reset","qual_name":"0.i2c_host_stress_all_with_rand_reset.97944049568680146597801338122249874695804843330881373557145754686620678064650","seed":97944049568680146597801338122249874695804843330881373557145754686620678064650,"line":117,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 743991661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between":[{"name":"i2c_target_stress_all_with_rand_reset","qual_name":"0.i2c_target_stress_all_with_rand_reset.102581469529862654638532742067596999290053053696539839775694322289643646142234","seed":102581469529862654638532742067596999290053053696539839775694322289643646142234,"line":115,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log","log_context":["UVM_INFO @ 910302140 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}],"Error-[CNST-CIF] Constraints inconsistency failure":[{"name":"i2c_target_tx_stretch_ctrl","qual_name":"0.i2c_target_tx_stretch_ctrl.106768132990112523840987919720516432265588885754188858973369557044376011027042","seed":106768132990112523840987919720516432265588885754188858973369557044376011027042,"line":127,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_tx_stretch_ctrl/latest/run.log","log_context":["src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872\n","  Constraints are inconsistent and cannot be solved.\n","  Please check the inconsistent constraints being printed above and rewrite \n","  them.\n"]}],"UVM_ERROR (csr_utils_pkg.sv:461) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: *":[{"name":"i2c_target_nack_txstretch","qual_name":"0.i2c_target_nack_txstretch.11984416926137106304712257571168206665920309269014681949755813293159647712149","seed":11984416926137106304712257571168206665920309269014681949755813293159647712149,"line":84,"log_path":"/nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_nack_txstretch/latest/run.log","log_context":["UVM_INFO @ 127167670 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] \n","--- UVM Report catcher Summary ---\n","\n","\n"]}]}},"passed":43,"total":50,"percent":86.0}