a99e70f| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | sysrst_ctrl_smoke | 5.000s | 2.137ms | 1 | 1 | 100.00 |
| V1 | input_output_inverted | sysrst_ctrl_in_out_inverted | 15.000s | 2.466ms | 1 | 1 | 100.00 |
| V1 | combo_detect_ec_rst | sysrst_ctrl_combo_detect_ec_rst | 7.000s | 2.229ms | 1 | 1 | 100.00 |
| V1 | combo_detect_ec_rst_with_pre_cond | sysrst_ctrl_combo_detect_ec_rst_with_pre_cond | 7.000s | 2.517ms | 1 | 1 | 100.00 |
| V1 | csr_hw_reset | sysrst_ctrl_csr_hw_reset | 30.000s | 6.040ms | 1 | 1 | 100.00 |
| V1 | csr_rw | sysrst_ctrl_csr_rw | 5.000s | 2.096ms | 1 | 1 | 100.00 |
| V1 | csr_bit_bash | sysrst_ctrl_csr_bit_bash | 5.200m | 48.160ms | 1 | 1 | 100.00 |
| V1 | csr_aliasing | sysrst_ctrl_csr_aliasing | 19.000s | 3.037ms | 1 | 1 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | sysrst_ctrl_csr_mem_rw_with_rand_reset | 13.000s | 2.040ms | 1 | 1 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | sysrst_ctrl_csr_rw | 5.000s | 2.096ms | 1 | 1 | 100.00 |
| sysrst_ctrl_csr_aliasing | 19.000s | 3.037ms | 1 | 1 | 100.00 | ||
| V1 | TOTAL | 9 | 9 | 100.00 | |||
| V2 | combo_detect | sysrst_ctrl_combo_detect | 3.400m | 177.253ms | 1 | 1 | 100.00 |
| V2 | combo_detect_with_pre_cond | sysrst_ctrl_combo_detect_with_pre_cond | 1.700m | 20.834ms | 1 | 1 | 100.00 |
| V2 | auto_block_key_outputs | sysrst_ctrl_auto_blk_key_output | 18.000s | 3.121ms | 1 | 1 | 100.00 |
| V2 | keyboard_input_triggered_interrupt | sysrst_ctrl_edge_detect | 5.000s | 3.671ms | 1 | 1 | 100.00 |
| V2 | pin_output_keyboard_inversion_control | sysrst_ctrl_pin_override_test | 7.000s | 2.527ms | 1 | 1 | 100.00 |
| V2 | pin_input_value_accessibility | sysrst_ctrl_pin_access_test | 7.000s | 2.264ms | 1 | 1 | 100.00 |
| V2 | ec_power_on_reset | sysrst_ctrl_ec_pwr_on_rst | 26.000s | 4.573ms | 1 | 1 | 100.00 |
| V2 | flash_write_protect_output | sysrst_ctrl_flash_wr_prot_out | 7.000s | 2.617ms | 1 | 1 | 100.00 |
| V2 | ultra_low_power_test | sysrst_ctrl_ultra_low_pwr | 8.000s | 84.854ms | 1 | 1 | 100.00 |
| V2 | sysrst_ctrl_feature_disable | sysrst_ctrl_feature_disable | 3.117m | 39.481ms | 1 | 1 | 100.00 |
| V2 | stress_all | sysrst_ctrl_stress_all | 33.000s | 6.588ms | 1 | 1 | 100.00 |
| V2 | alert_test | sysrst_ctrl_alert_test | 11.000s | 2.017ms | 1 | 1 | 100.00 |
| V2 | intr_test | sysrst_ctrl_intr_test | 6.000s | 2.027ms | 1 | 1 | 100.00 |
| V2 | tl_d_oob_addr_access | sysrst_ctrl_tl_errors | 12.000s | 2.046ms | 1 | 1 | 100.00 |
| V2 | tl_d_illegal_access | sysrst_ctrl_tl_errors | 12.000s | 2.046ms | 1 | 1 | 100.00 |
| V2 | tl_d_outstanding_access | sysrst_ctrl_csr_hw_reset | 30.000s | 6.040ms | 1 | 1 | 100.00 |
| sysrst_ctrl_csr_rw | 5.000s | 2.096ms | 1 | 1 | 100.00 | ||
| sysrst_ctrl_csr_aliasing | 19.000s | 3.037ms | 1 | 1 | 100.00 | ||
| sysrst_ctrl_same_csr_outstanding | 22.000s | 9.650ms | 1 | 1 | 100.00 | ||
| V2 | tl_d_partial_access | sysrst_ctrl_csr_hw_reset | 30.000s | 6.040ms | 1 | 1 | 100.00 |
| sysrst_ctrl_csr_rw | 5.000s | 2.096ms | 1 | 1 | 100.00 | ||
| sysrst_ctrl_csr_aliasing | 19.000s | 3.037ms | 1 | 1 | 100.00 | ||
| sysrst_ctrl_same_csr_outstanding | 22.000s | 9.650ms | 1 | 1 | 100.00 | ||
| V2 | TOTAL | 15 | 15 | 100.00 | |||
| V2S | tl_intg_err | sysrst_ctrl_sec_cm | 16.000s | 22.174ms | 1 | 1 | 100.00 |
| sysrst_ctrl_tl_intg_err | 1.533m | 22.244ms | 1 | 1 | 100.00 | ||
| V2S | sec_cm_bus_integrity | sysrst_ctrl_tl_intg_err | 1.533m | 22.244ms | 1 | 1 | 100.00 |
| V2S | TOTAL | 2 | 2 | 100.00 | |||
| V3 | stress_all_with_rand_reset | sysrst_ctrl_stress_all_with_rand_reset | 19.000s | 13.420ms | 0 | 1 | 0.00 |
| V3 | TOTAL | 0 | 1 | 0.00 | |||
| TOTAL | 26 | 27 | 96.30 |
xmsim: *E,COVITS: Covergroup instance sysrst_ctrl_key_invert_ctl_cg (/nightly/current_run/scratch/master/sysrst_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_sysrst_ctrl_env_*/seq_lib/sysrst_ctrl_in_out_inverted_vseq.sv:19) with 'sysrst_ctrl_key_invert_ctl_cg' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance sysrst_ctrl_key_invert_ctl_cg (/nightly/current_run/scratch/master/sysrst_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_sysrst_ctrl_env_*/seq_lib/sysrst_ctrl_in_out_inverted_vseq.sv:19) with the same instance name 'sysrst_ctrl_key_invert_ctl_cg'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name. has 1 failures:
0.sysrst_ctrl_stress_all_with_rand_reset.44472051425628391834690918761005792324532782411281420252228638253092413977200
Line 496, in log /nightly/current_run/scratch/master/sysrst_ctrl-sim-xcelium/0.sysrst_ctrl_stress_all_with_rand_reset/latest/run.log
xmsim: *E,COVITS: Covergroup instance sysrst_ctrl_key_invert_ctl_cg (/nightly/current_run/scratch/master/sysrst_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_sysrst_ctrl_env_0.1/seq_lib/sysrst_ctrl_in_out_inverted_vseq.sv:19) with 'sysrst_ctrl_key_invert_ctl_cg' as the instance name will not be saved to the database and its coverage will be merged with another covergroup instance sysrst_ctrl_key_invert_ctl_cg (/nightly/current_run/scratch/master/sysrst_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_sysrst_ctrl_env_0.1/seq_lib/sysrst_ctrl_in_out_inverted_vseq.sv:19) with the same instance name 'sysrst_ctrl_key_invert_ctl_cg'. This is because both the covergroup instances are having same description and are defined in the same scope with the same name.
xmsim: *W,COVNBT: (/nightly/current_run/scratch/master/sysrst_ctrl-sim-xcelium/default/fusesoc-work/src/lowrisc_tlul_common_0.1/rtl/tlul_assert.sv:282): Name of named block scope "gen_h2d" shall not be suffixed with a redundant "_T" in IMC type-based coverage in subsequent release in default mode. There may be other such named block scopes in the design.
xmsim: *W,CGNSIN: Name of covergroup instance "sysrst_ctrl_auto_block_debounce_ctl_cg" is same as the name of the covergroup "sysrst_ctrl_auto_block_debounce_ctl_cg".
xmsim: *W,CGNSIN: Name of covergroup instance "sysrst_ctrl_key_intr_status_cg" is same as the name of the covergroup "sysrst_ctrl_key_intr_status_cg".
xmsim: *W,CGNSIN: Name of covergroup instance "sysrst_ctrl_pin_in_value_cg" is same as the name of the covergroup "sysrst_ctrl_pin_in_value_cg".