ENTROPY_SRC/RNG_4BITS Simulation Results

Monday September 15 2025 00:04:07 UTC

GitHub Revision: c127aed

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 5.000s 28.136us 1 1 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 4.000s 23.893us 1 1 100.00
V1 csr_rw entropy_src_csr_rw 4.000s 18.832us 1 1 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 8.000s 166.430us 1 1 100.00
V1 csr_aliasing entropy_src_csr_aliasing 7.000s 417.923us 1 1 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 4.000s 45.576us 1 1 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 4.000s 18.832us 1 1 100.00
entropy_src_csr_aliasing 7.000s 417.923us 1 1 100.00
V1 TOTAL 6 6 100.00
V2 firmware entropy_src_smoke 5.000s 28.136us 1 1 100.00
entropy_src_rng 1.267m 15.140ms 1 1 100.00
entropy_src_fw_ov 1.100m 7.062ms 1 1 100.00
V2 firmware_mode entropy_src_fw_ov 1.100m 7.062ms 1 1 100.00
V2 rng_mode entropy_src_rng 1.267m 15.140ms 1 1 100.00
V2 rng_max_rate entropy_src_rng_max_rate 7.600m 10.054ms 1 1 100.00
V2 health_checks entropy_src_rng 1.267m 15.140ms 1 1 100.00
V2 conditioning entropy_src_rng 1.267m 15.140ms 1 1 100.00
V2 interrupts entropy_src_rng 1.267m 15.140ms 1 1 100.00
entropy_src_intr 29.000s 1.346ms 1 1 100.00
V2 alerts entropy_src_rng 1.267m 15.140ms 1 1 100.00
entropy_src_functional_alerts 10.000s 383.810us 1 1 100.00
V2 stress_all entropy_src_stress_all 1.883m 15.196ms 1 1 100.00
V2 functional_errors entropy_src_functional_errors 6.000s 51.091us 1 1 100.00
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 5.000s 331.846us 1 1 100.00
V2 intr_test entropy_src_intr_test 4.000s 23.808us 1 1 100.00
V2 alert_test entropy_src_alert_test 3.000s 85.274us 1 1 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 6.000s 230.052us 1 1 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 6.000s 230.052us 1 1 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 4.000s 23.893us 1 1 100.00
entropy_src_csr_rw 4.000s 18.832us 1 1 100.00
entropy_src_csr_aliasing 7.000s 417.923us 1 1 100.00
entropy_src_same_csr_outstanding 5.000s 201.557us 1 1 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 4.000s 23.893us 1 1 100.00
entropy_src_csr_rw 4.000s 18.832us 1 1 100.00
entropy_src_csr_aliasing 7.000s 417.923us 1 1 100.00
entropy_src_same_csr_outstanding 5.000s 201.557us 1 1 100.00
V2 TOTAL 12 12 100.00
V2S tl_intg_err entropy_src_sec_cm 5.000s 187.333us 1 1 100.00
entropy_src_tl_intg_err 6.000s 1.238ms 1 1 100.00
V2S sec_cm_config_regwen entropy_src_rng 1.267m 15.140ms 1 1 100.00
entropy_src_cfg_regwen 4.000s 231.375us 1 1 100.00
V2S sec_cm_config_mubi entropy_src_rng 1.267m 15.140ms 1 1 100.00
V2S sec_cm_config_redun entropy_src_rng 1.267m 15.140ms 1 1 100.00
V2S sec_cm_intersig_mubi entropy_src_rng 1.267m 15.140ms 1 1 100.00
entropy_src_fw_ov 1.100m 7.062ms 1 1 100.00
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 6.000s 51.091us 1 1 100.00
entropy_src_sec_cm 5.000s 187.333us 1 1 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 6.000s 51.091us 1 1 100.00
entropy_src_sec_cm 5.000s 187.333us 1 1 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 1.267m 15.140ms 1 1 100.00
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 6.000s 51.091us 1 1 100.00
entropy_src_sec_cm 5.000s 187.333us 1 1 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 6.000s 51.091us 1 1 100.00
entropy_src_sec_cm 5.000s 187.333us 1 1 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 6.000s 51.091us 1 1 100.00
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 10.000s 383.810us 1 1 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 6.000s 1.238ms 1 1 100.00
V2S TOTAL 3 3 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 50.000s 7.268ms 1 1 100.00
V3 TOTAL 1 1 100.00
TOTAL 22 22 100.00