DMA Simulation Results

Friday March 07 2025 17:56:47 UTC

GitHub Revision: 371772adfd

Branch: dj-sw-nightly

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	dma_memory_smoke	dma_memory_smoke	40.000s	357.586us	25	25	100.00
V1	dma_handshake_smoke	dma_handshake_smoke	41.000s	1.450ms	25	25	100.00
V1	dma_generic_smoke	dma_generic_smoke	42.000s	315.522us	50	50	100.00
V1	csr_hw_reset	dma_csr_hw_reset	4.000s	32.435us	5	5	100.00
V1	csr_rw	dma_csr_rw	5.000s	32.965us	20	20	100.00
V1	csr_bit_bash	dma_csr_bit_bash	18.000s	1.518ms	5	5	100.00
V1	csr_aliasing	dma_csr_aliasing	10.000s	2.731ms	5	5	100.00
V1	csr_mem_rw_with_rand_reset	dma_csr_mem_rw_with_rand_reset	5.000s	28.746us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	dma_csr_rw	5.000s	32.965us	20	20	100.00
		dma_csr_aliasing	10.000s	2.731ms	5	5	100.00
V1		TOTAL			155	155	100.00
V2	dma_memory_region_lock	dma_memory_region_lock	2.033m	13.241ms	5	5	100.00
V2	dma_handshake_stress	dma_handshake_stress	58.650m	1.549s	2	3	66.67
V2	dma_memory_stress	dma_memory_stress	49.500m	509.398ms	3	3	100.00
V2	dma_generic_stress	dma_generic_stress	8.100m	38.593ms	5	5	100.00
V2	dma_handshake_mem_buffer_overflow	dma_handshake_stress	58.650m	1.549s	2	3	66.67
V2	dma_abort	dma_abort	41.000s	800.211us	5	5	100.00
V2	dma_stress_all	dma_stress_all	3.000m	12.015ms	3	3	100.00
V2	intr_test	dma_intr_test	5.000s	12.837us	50	50	100.00
V2	tl_d_oob_addr_access	dma_tl_errors	8.000s	542.253us	20	20	100.00
V2	tl_d_illegal_access	dma_tl_errors	8.000s	542.253us	20	20	100.00
V2	tl_d_outstanding_access	dma_csr_hw_reset	4.000s	32.435us	5	5	100.00
		dma_csr_rw	5.000s	32.965us	20	20	100.00
		dma_csr_aliasing	10.000s	2.731ms	5	5	100.00
		dma_same_csr_outstanding	6.000s	107.340us	20	20	100.00
V2	tl_d_partial_access	dma_csr_hw_reset	4.000s	32.435us	5	5	100.00
		dma_csr_rw	5.000s	32.965us	20	20	100.00
		dma_csr_aliasing	10.000s	2.731ms	5	5	100.00
		dma_same_csr_outstanding	6.000s	107.340us	20	20	100.00
V2		TOTAL			113	114	99.12
V2S	dma_illegal_addr_range	dma_mem_enabled	54.000s	56.451us	5	5	100.00
		dma_generic_stress	8.100m	38.593ms	5	5	100.00
		dma_handshake_stress	58.650m	1.549s	2	3	66.67
V2S	tl_intg_err	dma_tl_intg_err	7.000s	783.082us	20	20	100.00
V2S		TOTAL			25	25	100.00
	Unmapped tests	dma_short_transfer	2.783m	18.313ms	5	5	100.00
		dma_longer_transfer	41.000s	1.878ms	5	5	100.00
		TOTAL			303	304	99.67

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
76.20	97.08	95.25	97.04	96.52	84.02	82.76	97.86	41.63

Failure Buckets

• Job timed out after * minutes has 1 failures:
  • Test dma_handshake_stress has 1 failures.

    • 2.dma_handshake_stress.26484138610398458653401372621485102629489657745402825723056936766835729599874
      Log /nightly/runs/scratch/dj-sw-nightly/dma-sim-xcelium/2.dma_handshake_stress/latest/run.log

        Job timed out after 60 minutes