EDN Simulation Results

Friday March 07 2025 17:56:47 UTC

GitHub Revision: 371772adfd

Branch: dj-sw-nightly

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	edn_smoke	2.660s	76.026us	50	50	100.00
V1	csr_hw_reset	edn_csr_hw_reset	2.890s	17.172us	5	5	100.00
V1	csr_rw	edn_csr_rw	3.100s	56.237us	20	20	100.00
V1	csr_bit_bash	edn_csr_bit_bash	11.030s	10.369ms	4	5	80.00
V1	csr_aliasing	edn_csr_aliasing	3.140s	35.701us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	edn_csr_mem_rw_with_rand_reset	3.610s	76.626us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	edn_csr_rw	3.100s	56.237us	20	20	100.00
		edn_csr_aliasing	3.140s	35.701us	5	5	100.00
V1		TOTAL			104	105	99.05
V2	firmware	edn_genbits	55.430s	5.462ms	300	300	100.00
V2	csrng_commands	edn_genbits	55.430s	5.462ms	300	300	100.00
V2	genbits	edn_genbits	55.430s	5.462ms	300	300	100.00
V2	interrupts	edn_intr	2.670s	21.998us	50	50	100.00
V2	alerts	edn_alert	2.830s	49.311us	200	200	100.00
V2	errs	edn_err	2.680s	30.699us	100	100	100.00
V2	disable	edn_disable	2.530s	11.915us	50	50	100.00
		edn_disable_auto_req_mode	2.750s	31.645us	50	50	100.00
V2	stress_all	edn_stress_all	5.920s	389.911us	50	50	100.00
V2	intr_test	edn_intr_test	2.980s	13.615us	50	50	100.00
V2	alert_test	edn_alert_test	2.670s	77.214us	50	50	100.00
V2	tl_d_oob_addr_access	edn_tl_errors	5.190s	470.002us	20	20	100.00
V2	tl_d_illegal_access	edn_tl_errors	5.190s	470.002us	20	20	100.00
V2	tl_d_outstanding_access	edn_csr_hw_reset	2.890s	17.172us	5	5	100.00
		edn_csr_rw	3.100s	56.237us	20	20	100.00
		edn_csr_aliasing	3.140s	35.701us	5	5	100.00
		edn_same_csr_outstanding	3.240s	127.893us	20	20	100.00
V2	tl_d_partial_access	edn_csr_hw_reset	2.890s	17.172us	5	5	100.00
		edn_csr_rw	3.100s	56.237us	20	20	100.00
		edn_csr_aliasing	3.140s	35.701us	5	5	100.00
		edn_same_csr_outstanding	3.240s	127.893us	20	20	100.00
V2		TOTAL			940	940	100.00
V2S	tl_intg_err	edn_sec_cm	9.730s	1.592ms	5	5	100.00
		edn_tl_intg_err	3.920s	617.451us	20	20	100.00
V2S	sec_cm_config_regwen	edn_regwen	2.130s	20.182us	10	10	100.00
V2S	sec_cm_config_mubi	edn_alert	2.830s	49.311us	200	200	100.00
V2S	sec_cm_main_sm_fsm_sparse	edn_sec_cm	9.730s	1.592ms	5	5	100.00
V2S	sec_cm_ack_sm_fsm_sparse	edn_sec_cm	9.730s	1.592ms	5	5	100.00
V2S	sec_cm_fifo_ctr_redun	edn_sec_cm	9.730s	1.592ms	5	5	100.00
V2S	sec_cm_ctr_redun	edn_sec_cm	9.730s	1.592ms	5	5	100.00
V2S	sec_cm_main_sm_ctr_local_esc	edn_alert	2.830s	49.311us	200	200	100.00
		edn_sec_cm	9.730s	1.592ms	5	5	100.00
V2S	sec_cm_cs_rdata_bus_consistency	edn_alert	2.830s	49.311us	200	200	100.00
V2S	sec_cm_tile_link_bus_integrity	edn_tl_intg_err	3.920s	617.451us	20	20	100.00
V2S		TOTAL			35	35	100.00
V3	stress_all_with_rand_reset	edn_stress_all_with_rand_reset	1.662m	5.457ms	30	50	60.00
V3		TOTAL			30	50	60.00
		TOTAL			1109	1130	98.14

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
95.96	98.32	94.23	97.02	93.02	96.33	99.78	92.99

Failure Buckets

• Job timed out after * minutes has 20 failures:
  • Test edn_stress_all_with_rand_reset has 20 failures.

    • 2.edn_stress_all_with_rand_reset.114776637711355097979526502978647081368200030647681527730332768476295405222768
      Log /nightly/runs/scratch/dj-sw-nightly/edn-sim-vcs/2.edn_stress_all_with_rand_reset/latest/run.log

        Job timed out after 180 minutes
      

    • 6.edn_stress_all_with_rand_reset.80396080989044045083355505125246990244257984125243952864469030570379655097939
      Log /nightly/runs/scratch/dj-sw-nightly/edn-sim-vcs/6.edn_stress_all_with_rand_reset/latest/run.log

        Job timed out after 180 minutes
      

    • ... and 18 more failures.

• UVM_FATAL (cip_base_vseq.sv:573) [edn_common_vseq] timeout occurred! has 1 failures:
  • Test edn_csr_bit_bash has 1 failures.

    • 1.edn_csr_bit_bash.90955888181023252773645343431084341814666709428088274951340429340543443674457
      Line 79, in log /nightly/runs/scratch/dj-sw-nightly/edn-sim-vcs/1.edn_csr_bit_bash/latest/run.log

        UVM_FATAL @ 10368749927 ps: (cip_base_vseq.sv:573) [uvm_test_top.env.virtual_sequencer.edn_common_vseq] timeout occurred!
        UVM_INFO @ 10368749927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---