371772adfd| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | keymgr_smoke | 22.280s | 1.309ms | 50 | 50 | 100.00 |
| V1 | random | keymgr_random | 28.580s | 6.364ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | keymgr_csr_hw_reset | 2.470s | 28.319us | 5 | 5 | 100.00 |
| V1 | csr_rw | keymgr_csr_rw | 2.760s | 33.261us | 19 | 20 | 95.00 |
| V1 | csr_bit_bash | keymgr_csr_bit_bash | 10.080s | 2.040ms | 2 | 5 | 40.00 |
| V1 | csr_aliasing | keymgr_csr_aliasing | 13.350s | 503.896us | 3 | 5 | 60.00 |
| V1 | csr_mem_rw_with_rand_reset | keymgr_csr_mem_rw_with_rand_reset | 3.340s | 138.133us | 15 | 20 | 75.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | keymgr_csr_rw | 2.760s | 33.261us | 19 | 20 | 95.00 |
| keymgr_csr_aliasing | 13.350s | 503.896us | 3 | 5 | 60.00 | ||
| V1 | TOTAL | 144 | 155 | 92.90 | |||
| V2 | cfgen_during_op | keymgr_cfg_regwen | 1.494m | 10.366ms | 47 | 50 | 94.00 |
| V2 | sideload | keymgr_sideload | 23.200s | 1.078ms | 50 | 50 | 100.00 |
| keymgr_sideload_kmac | 28.320s | 1.575ms | 50 | 50 | 100.00 | ||
| keymgr_sideload_aes | 55.000s | 7.467ms | 49 | 50 | 98.00 | ||
| keymgr_sideload_otbn | 37.020s | 2.368ms | 48 | 50 | 96.00 | ||
| V2 | direct_to_disabled_state | keymgr_direct_to_disabled | 7.920s | 1.612ms | 50 | 50 | 100.00 |
| V2 | lc_disable | keymgr_lc_disable | 24.310s | 1.281ms | 50 | 50 | 100.00 |
| V2 | kmac_error_response | keymgr_kmac_rsp_err | 8.520s | 764.897us | 32 | 50 | 64.00 |
| V2 | invalid_sw_input | keymgr_sw_invalid_input | 56.900s | 7.639ms | 49 | 50 | 98.00 |
| V2 | invalid_hw_input | keymgr_hwsw_invalid_input | 36.440s | 2.148ms | 48 | 50 | 96.00 |
| V2 | sync_async_fault_cross | keymgr_sync_async_fault_cross | 19.860s | 2.971ms | 40 | 50 | 80.00 |
| V2 | stress_all | keymgr_stress_all | 4.167m | 51.951ms | 45 | 50 | 90.00 |
| V2 | intr_test | keymgr_intr_test | 2.360s | 10.254us | 50 | 50 | 100.00 |
| V2 | alert_test | keymgr_alert_test | 2.370s | 24.341us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | keymgr_tl_errors | 4.420s | 1.020ms | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | keymgr_tl_errors | 4.420s | 1.020ms | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | keymgr_csr_hw_reset | 2.470s | 28.319us | 5 | 5 | 100.00 |
| keymgr_csr_rw | 2.760s | 33.261us | 19 | 20 | 95.00 | ||
| keymgr_csr_aliasing | 13.350s | 503.896us | 3 | 5 | 60.00 | ||
| keymgr_same_csr_outstanding | 3.480s | 85.784us | 16 | 20 | 80.00 | ||
| V2 | tl_d_partial_access | keymgr_csr_hw_reset | 2.470s | 28.319us | 5 | 5 | 100.00 |
| keymgr_csr_rw | 2.760s | 33.261us | 19 | 20 | 95.00 | ||
| keymgr_csr_aliasing | 13.350s | 503.896us | 3 | 5 | 60.00 | ||
| keymgr_same_csr_outstanding | 3.480s | 85.784us | 16 | 20 | 80.00 | ||
| V2 | TOTAL | 694 | 740 | 93.78 | |||
| V2S | sec_cm_additional_check | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | tl_intg_err | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| keymgr_tl_intg_err | 5.190s | 206.019us | 16 | 20 | 80.00 | ||
| V2S | shadow_reg_update_error | keymgr_shadow_reg_errors | 4.360s | 164.726us | 3 | 20 | 15.00 |
| V2S | shadow_reg_read_clear_staged_value | keymgr_shadow_reg_errors | 4.360s | 164.726us | 3 | 20 | 15.00 |
| V2S | shadow_reg_storage_error | keymgr_shadow_reg_errors | 4.360s | 164.726us | 3 | 20 | 15.00 |
| V2S | shadowed_reset_glitch | keymgr_shadow_reg_errors | 4.360s | 164.726us | 3 | 20 | 15.00 |
| V2S | shadow_reg_update_error_with_csr_rw | keymgr_shadow_reg_errors_with_csr_rw | 8.750s | 1.169ms | 6 | 20 | 30.00 |
| V2S | prim_count_check | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | prim_fsm_check | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | sec_cm_bus_integrity | keymgr_tl_intg_err | 5.190s | 206.019us | 16 | 20 | 80.00 |
| V2S | sec_cm_config_shadow | keymgr_shadow_reg_errors | 4.360s | 164.726us | 3 | 20 | 15.00 |
| V2S | sec_cm_op_config_regwen | keymgr_cfg_regwen | 1.494m | 10.366ms | 47 | 50 | 94.00 |
| V2S | sec_cm_reseed_config_regwen | keymgr_random | 28.580s | 6.364ms | 50 | 50 | 100.00 |
| keymgr_csr_rw | 2.760s | 33.261us | 19 | 20 | 95.00 | ||
| V2S | sec_cm_sw_binding_config_regwen | keymgr_random | 28.580s | 6.364ms | 50 | 50 | 100.00 |
| keymgr_csr_rw | 2.760s | 33.261us | 19 | 20 | 95.00 | ||
| V2S | sec_cm_max_key_ver_config_regwen | keymgr_random | 28.580s | 6.364ms | 50 | 50 | 100.00 |
| keymgr_csr_rw | 2.760s | 33.261us | 19 | 20 | 95.00 | ||
| V2S | sec_cm_lc_ctrl_intersig_mubi | keymgr_lc_disable | 24.310s | 1.281ms | 50 | 50 | 100.00 |
| V2S | sec_cm_constants_consistency | keymgr_hwsw_invalid_input | 36.440s | 2.148ms | 48 | 50 | 96.00 |
| V2S | sec_cm_intersig_consistency | keymgr_hwsw_invalid_input | 36.440s | 2.148ms | 48 | 50 | 96.00 |
| V2S | sec_cm_hw_key_sw_noaccess | keymgr_random | 28.580s | 6.364ms | 50 | 50 | 100.00 |
| V2S | sec_cm_output_keys_ctrl_redun | keymgr_sideload_protect | 22.840s | 1.699ms | 49 | 50 | 98.00 |
| V2S | sec_cm_ctrl_fsm_sparse | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | sec_cm_data_fsm_sparse | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | sec_cm_ctrl_fsm_local_esc | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | sec_cm_ctrl_fsm_consistency | keymgr_custom_cm | 8.780s | 1.484ms | 37 | 50 | 74.00 |
| V2S | sec_cm_ctrl_fsm_global_esc | keymgr_lc_disable | 24.310s | 1.281ms | 50 | 50 | 100.00 |
| V2S | sec_cm_ctrl_ctr_redun | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | sec_cm_kmac_if_fsm_sparse | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | sec_cm_kmac_if_ctr_redun | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | sec_cm_kmac_if_cmd_ctrl_consistency | keymgr_custom_cm | 8.780s | 1.484ms | 37 | 50 | 74.00 |
| V2S | sec_cm_kmac_if_done_ctrl_consistency | keymgr_custom_cm | 8.780s | 1.484ms | 37 | 50 | 74.00 |
| V2S | sec_cm_reseed_ctr_redun | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | sec_cm_side_load_sel_ctrl_consistency | keymgr_custom_cm | 8.780s | 1.484ms | 37 | 50 | 74.00 |
| V2S | sec_cm_sideload_ctrl_fsm_sparse | keymgr_sec_cm | 16.340s | 646.371us | 5 | 5 | 100.00 |
| V2S | sec_cm_ctrl_key_integrity | keymgr_custom_cm | 8.780s | 1.484ms | 37 | 50 | 74.00 |
| V2S | TOTAL | 116 | 165 | 70.30 | |||
| V3 | stress_all_with_rand_reset | keymgr_stress_all_with_rand_reset | 22.650s | 13.416ms | 30 | 50 | 60.00 |
| V3 | TOTAL | 30 | 50 | 60.00 | |||
| TOTAL | 984 | 1110 | 88.65 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 97.72 | 99.10 | 97.87 | 98.24 | 100.00 | 99.01 | 98.61 | 91.22 |
Offending '(d2h.d_error || ((d2h.d_data & *) == (exp_vals[*] & *)))' has 24 failures:
Test keymgr_csr_rw has 1 failures.
1.keymgr_csr_rw.8102448498091839897758225564660773178801984807788439620389586032163900433439
Line 76, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/1.keymgr_csr_rw/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[14] & 'hffffffff)))'
UVM_ERROR @ 19345870 ps: (keymgr_csr_assert_fpv.sv:436) [ASSERT FAILED] attest_sw_binding_1_rd_A
UVM_INFO @ 19345870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_csr_aliasing has 2 failures.
1.keymgr_csr_aliasing.46405140587401024009988077293953106511058857180141131732095698892634934858067
Line 76, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/1.keymgr_csr_aliasing/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[19] & 'hffffffff)))'
UVM_ERROR @ 545970746 ps: (keymgr_csr_assert_fpv.sv:461) [ASSERT FAILED] attest_sw_binding_6_rd_A
UVM_INFO @ 545970746 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.keymgr_csr_aliasing.74181055385894775238950807697726765511043956743803902845095480758584500991402
Line 76, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/2.keymgr_csr_aliasing/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[16] & 'hffffffff)))'
UVM_ERROR @ 209303243 ps: (keymgr_csr_assert_fpv.sv:446) [ASSERT FAILED] attest_sw_binding_3_rd_A
UVM_INFO @ 209303243 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_same_csr_outstanding has 4 failures.
1.keymgr_same_csr_outstanding.72426059896137643400552618059109639042219779421397737802229870338620105950851
Line 76, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/1.keymgr_same_csr_outstanding/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[19] & 'hffffffff)))'
UVM_ERROR @ 62351545 ps: (keymgr_csr_assert_fpv.sv:461) [ASSERT FAILED] attest_sw_binding_6_rd_A
UVM_INFO @ 62351545 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
3.keymgr_same_csr_outstanding.16704186595958671371895433995121080028310241590372542309261543630367075867780
Line 76, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/3.keymgr_same_csr_outstanding/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[13] & 'hffffffff)))'
UVM_ERROR @ 52738050 ps: (keymgr_csr_assert_fpv.sv:431) [ASSERT FAILED] attest_sw_binding_0_rd_A
UVM_INFO @ 52738050 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
Test keymgr_tl_intg_err has 4 failures.
2.keymgr_tl_intg_err.43045584317422714347519405489636509888825781001514124679273738531125187713799
Line 106, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/2.keymgr_tl_intg_err/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[8] & 'hffffffff)))'
UVM_ERROR @ 39654038 ps: (keymgr_csr_assert_fpv.sv:406) [ASSERT FAILED] sealing_sw_binding_3_rd_A
UVM_INFO @ 39654038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
10.keymgr_tl_intg_err.76155740576669582705281933538171929906833031622864917184752501456386706053064
Line 90, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/10.keymgr_tl_intg_err/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[15] & 'hffffffff)))'
UVM_ERROR @ 85610096 ps: (keymgr_csr_assert_fpv.sv:441) [ASSERT FAILED] attest_sw_binding_2_rd_A
UVM_INFO @ 85610096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
Test keymgr_csr_bit_bash has 3 failures.
2.keymgr_csr_bit_bash.82537002117006279417825939768221698634212367315418030994973009677864185915394
Line 76, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/2.keymgr_csr_bit_bash/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[9] & 'hffffffff)))'
UVM_ERROR @ 2040107272 ps: (keymgr_csr_assert_fpv.sv:411) [ASSERT FAILED] sealing_sw_binding_4_rd_A
UVM_INFO @ 2040107272 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
3.keymgr_csr_bit_bash.66785824399780284264348914871520603447870182679431786234613458599050465042927
Line 76, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/3.keymgr_csr_bit_bash/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[5] & 'hffffffff)))'
UVM_ERROR @ 926387189 ps: (keymgr_csr_assert_fpv.sv:391) [ASSERT FAILED] sealing_sw_binding_0_rd_A
UVM_INFO @ 926387189 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
... and 2 more tests.
UVM_FATAL (alert_receiver_driver.sv:145) [driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q has 23 failures:
0.keymgr_shadow_reg_errors.106765619529191137436207252462078430622574389983958596897926160068484542596291
Line 77, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/0.keymgr_shadow_reg_errors/latest/run.log
UVM_FATAL @ 8987936 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 8987936 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.keymgr_shadow_reg_errors.4929534357917898411169789795437233251725558397809639714327427756451884716772
Line 104, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/1.keymgr_shadow_reg_errors/latest/run.log
UVM_FATAL @ 114614038 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 114614038 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 15 more failures.
3.keymgr_shadow_reg_errors_with_csr_rw.111534206863977735768656323432758805273067622560947040551014930352250294369904
Line 77, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/3.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_FATAL @ 24694760 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 24694760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.keymgr_shadow_reg_errors_with_csr_rw.19209421129842999728743984332536078353992800466347232326724853354587935527676
Line 111, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/4.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_FATAL @ 119914857 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 119914857 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 4 more failures.
UVM_ERROR (cip_base_vseq.sv:890) [keymgr_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 17 failures:
1.keymgr_stress_all_with_rand_reset.69952442192672489183872534836191278480276379477895864859615465977768476809142
Line 171, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/1.keymgr_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 505528370 ps: (cip_base_vseq.sv:890) [uvm_test_top.env.virtual_sequencer.keymgr_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 505528370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
3.keymgr_stress_all_with_rand_reset.43902976075954604366493166258739872828700891684346786439593135180657734339525
Line 2210, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/3.keymgr_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 1607043044 ps: (cip_base_vseq.sv:890) [uvm_test_top.env.virtual_sequencer.keymgr_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 1607043044 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 15 more failures.
UVM_ERROR (cip_base_vseq.sv:969) [keymgr_custom_cm_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault_err does not trigger! has 13 failures:
7.keymgr_custom_cm.92866535993898437510501559981305201619428302678610434945063434113801746931544
Line 322, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/7.keymgr_custom_cm/latest/run.log
UVM_ERROR @ 85375052 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_custom_cm_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 85375052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
11.keymgr_custom_cm.46992923629343002381961458906133448763900199222517747582694843725492984695267
Line 232, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/11.keymgr_custom_cm/latest/run.log
UVM_ERROR @ 67194130 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_custom_cm_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 67194130 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 11 more failures.
UVM_ERROR (cip_base_scoreboard.sv:327) scoreboard [scoreboard] alert fatal_fault_err did not trigger max_delay:* has 12 failures:
1.keymgr_kmac_rsp_err.92694697982544880226566296182207688531131238917540561761688269182681594147996
Line 362, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/1.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 101502881 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault_err did not trigger max_delay:0
UVM_INFO @ 101502881 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
3.keymgr_kmac_rsp_err.68536844631929420962385109784392016252904653627106193858750844057666731352173
Line 391, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/3.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 112003494 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault_err did not trigger max_delay:0
UVM_INFO @ 112003494 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 10 more failures.
UVM_ERROR (cip_base_scoreboard.sv:327) scoreboard [scoreboard] alert recov_operation_err did not trigger max_delay:* has 11 failures:
Test keymgr_stress_all has 4 failures.
1.keymgr_stress_all.90067027187994594165140198830972638185555429594279584308979652044222337409022
Line 1633, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/1.keymgr_stress_all/latest/run.log
UVM_ERROR @ 483335306 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 483335306 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
6.keymgr_stress_all.97023322619344646197593684024741903498833764846322306650355423648146860412139
Line 1645, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/6.keymgr_stress_all/latest/run.log
UVM_ERROR @ 4328641677 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 4328641677 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
Test keymgr_kmac_rsp_err has 1 failures.
4.keymgr_kmac_rsp_err.107739036243569413121144377769089659962240451882508088855386348323637627999448
Line 430, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/4.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 18270246 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 18270246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_sideload_otbn has 2 failures.
19.keymgr_sideload_otbn.80018904552921916789458011902530155381071833767646622245581144483115258485898
Line 156, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/19.keymgr_sideload_otbn/latest/run.log
UVM_ERROR @ 161328849 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 161328849 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
41.keymgr_sideload_otbn.100200153339529822317006335797796067648019977706395303775316984825280781880629
Line 131, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/41.keymgr_sideload_otbn/latest/run.log
UVM_ERROR @ 192876083 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 192876083 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_sw_invalid_input has 1 failures.
25.keymgr_sw_invalid_input.12589025816625108637206201687209052280369669897788251485026297219593199665597
Line 299, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/25.keymgr_sw_invalid_input/latest/run.log
UVM_ERROR @ 3027228339 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 3027228339 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_hwsw_invalid_input has 1 failures.
25.keymgr_hwsw_invalid_input.67419568547199198606918660158528852358759460358776140584072970797644128955354
Line 482, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/25.keymgr_hwsw_invalid_input/latest/run.log
UVM_ERROR @ 28670719 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 28670719 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more tests.
UVM_ERROR (cip_base_vseq.sv:969) [keymgr_sync_async_fault_cross_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault_err does not trigger! has 10 failures:
2.keymgr_sync_async_fault_cross.8724793637508072226488909117630527363161308041766395980406260831118007010085
Line 124, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/2.keymgr_sync_async_fault_cross/latest/run.log
UVM_ERROR @ 45192357 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_sync_async_fault_cross_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 45192357 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
5.keymgr_sync_async_fault_cross.106191142635068585354978290925271870191991640145064177989504605479552358477968
Line 106, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/5.keymgr_sync_async_fault_cross/latest/run.log
UVM_ERROR @ 155281063 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_sync_async_fault_cross_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 155281063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 8 more failures.
UVM_ERROR (cip_base_scoreboard.sv:249) scoreboard [scoreboard] alert fatal_fault_err has unexpected timeout error has 5 failures:
0.keymgr_kmac_rsp_err.40388836114934018588859352520674020000079445796922675142360226404136287941949
Line 332, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/0.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 42012540 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault_err has unexpected timeout error
UVM_INFO @ 42012540 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.keymgr_kmac_rsp_err.27207273677879701530181351609860490302682788968567340658716588955626056285990
Line 163, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/2.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 96349685 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault_err has unexpected timeout error
UVM_INFO @ 96349685 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
UVM_ERROR (cip_base_scoreboard.sv:249) scoreboard [scoreboard] alert recov_operation_err has unexpected timeout error has 5 failures:
Test keymgr_stress_all_with_rand_reset has 2 failures.
12.keymgr_stress_all_with_rand_reset.100221066195757671919332924931866717383227483620154036125826430790737591127622
Line 1985, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/12.keymgr_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 1685337955 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err has unexpected timeout error
UVM_INFO @ 1685337955 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
43.keymgr_stress_all_with_rand_reset.91787639249740411521900412065000132386310199992736353600383862589727415003443
Line 1074, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/43.keymgr_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 690981064 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err has unexpected timeout error
UVM_INFO @ 690981064 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_hwsw_invalid_input has 1 failures.
18.keymgr_hwsw_invalid_input.102461578440882044003135922912098594304052475608733432547181689903114838313856
Line 375, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/18.keymgr_hwsw_invalid_input/latest/run.log
UVM_ERROR @ 61046360 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err has unexpected timeout error
UVM_INFO @ 61046360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_sideload_protect has 1 failures.
23.keymgr_sideload_protect.93055596302564148365070601024478863153357545880973617828265069549095665193271
Line 201, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/23.keymgr_sideload_protect/latest/run.log
UVM_ERROR @ 13873626 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err has unexpected timeout error
UVM_INFO @ 13873626 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_sideload_aes has 1 failures.
38.keymgr_sideload_aes.46316452621784288671756556388883632953944216195928507631900118143243454628598
Line 156, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/38.keymgr_sideload_aes/latest/run.log
UVM_ERROR @ 49178804 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err has unexpected timeout error
UVM_INFO @ 49178804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:969) [keymgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault_err does not trigger! has 3 failures:
1.keymgr_shadow_reg_errors_with_csr_rw.99496322277293298095753902192596224352089571954256703548312278282033247677910
Line 98, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/1.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_ERROR @ 198077099 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 198077099 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
7.keymgr_shadow_reg_errors_with_csr_rw.48475335594285598456743714855426480953987419795403703998973088252364775483607
Line 124, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/7.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_ERROR @ 1169224337 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 1169224337 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_ERROR (keymgr_scoreboard.sv:794) [scoreboard] Check failed item.d_data == gmv(csr) (* [] vs * []) reg name: keymgr_reg_block.start` has 2 failures:
25.keymgr_cfg_regwen.88702491608960782140204121930448337870682960464066840243532382801393859337272
Line 81, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/25.keymgr_cfg_regwen/latest/run.log
UVM_ERROR @ 9803390 ps: (keymgr_scoreboard.sv:794) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (0 [0x0] vs 1 [0x1]) reg name: keymgr_reg_block.start
UVM_INFO @ 9803390 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
28.keymgr_cfg_regwen.3837704013918223939704265743887848916102234083416607841319848583043189011909
Line 301, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/28.keymgr_cfg_regwen/latest/run.log
UVM_ERROR @ 58110993 ps: (keymgr_scoreboard.sv:794) [uvm_test_top.env.scoreboard] Check failed item.d_data == `gmv(csr) (0 [0x0] vs 1 [0x1]) reg name: keymgr_reg_block.start
UVM_INFO @ 58110993 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (keymgr_scoreboard.sv:766) [scoreboard] Check failed item.d_data != gmv(csr) (* [] vs * []) reg name: keymgr_reg_block.sw_share1_output_*` has 1 failures:
37.keymgr_stress_all.9576803122500662939513037446860072097169211286217345527341946094392056403537
Line 314, in log /nightly/runs/scratch/dj-sw-nightly/keymgr-sim-vcs/37.keymgr_stress_all/latest/run.log
UVM_ERROR @ 426523472 ps: (keymgr_scoreboard.sv:766) [uvm_test_top.env.scoreboard] Check failed item.d_data != `gmv(csr) (2126202375 [0x7ebb4607] vs 2126202375 [0x7ebb4607]) reg name: keymgr_reg_block.sw_share1_output_2
UVM_INFO @ 426523472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---