KEYMGR_DPE Simulation Results

Friday March 07 2025 17:56:47 UTC

GitHub Revision: 371772adfd

Branch: dj-sw-nightly

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke keymgr_dpe_smoke 3.712m 24.170ms 40 50 80.00
V1 csr_hw_reset keymgr_dpe_csr_hw_reset 2.610s 265.688us 5 5 100.00
V1 csr_rw keymgr_dpe_csr_rw 2.580s 25.680us 20 20 100.00
V1 csr_bit_bash keymgr_dpe_csr_bit_bash 7.650s 1.189ms 5 5 100.00
V1 csr_aliasing keymgr_dpe_csr_aliasing 5.010s 503.393us 5 5 100.00
V1 csr_mem_rw_with_rand_reset keymgr_dpe_csr_mem_rw_with_rand_reset 2.950s 121.676us 19 20 95.00
V1 regwen_csr_and_corresponding_lockable_csr keymgr_dpe_csr_rw 2.580s 25.680us 20 20 100.00
keymgr_dpe_csr_aliasing 5.010s 503.393us 5 5 100.00
V1 TOTAL 94 105 89.52
V2 intr_test keymgr_dpe_intr_test 2.240s 39.913us 50 50 100.00
V2 alert_test keymgr_dpe_alert_test 2.410s 138.626us 50 50 100.00
V2 tl_d_oob_addr_access keymgr_dpe_tl_errors 5.050s 100.736us 20 20 100.00
V2 tl_d_illegal_access keymgr_dpe_tl_errors 5.050s 100.736us 20 20 100.00
V2 tl_d_outstanding_access keymgr_dpe_csr_hw_reset 2.610s 265.688us 5 5 100.00
keymgr_dpe_csr_rw 2.580s 25.680us 20 20 100.00
keymgr_dpe_csr_aliasing 5.010s 503.393us 5 5 100.00
keymgr_dpe_same_csr_outstanding 3.860s 78.567us 20 20 100.00
V2 tl_d_partial_access keymgr_dpe_csr_hw_reset 2.610s 265.688us 5 5 100.00
keymgr_dpe_csr_rw 2.580s 25.680us 20 20 100.00
keymgr_dpe_csr_aliasing 5.010s 503.393us 5 5 100.00
keymgr_dpe_same_csr_outstanding 3.860s 78.567us 20 20 100.00
V2 TOTAL 140 140 100.00
V2S tl_intg_err keymgr_dpe_sec_cm 11.960s 3.310ms 5 5 100.00
keymgr_dpe_tl_intg_err 6.400s 290.902us 20 20 100.00
V2S shadow_reg_update_error keymgr_dpe_shadow_reg_errors 3.610s 344.959us 4 20 20.00
V2S shadow_reg_read_clear_staged_value keymgr_dpe_shadow_reg_errors 3.610s 344.959us 4 20 20.00
V2S shadow_reg_storage_error keymgr_dpe_shadow_reg_errors 3.610s 344.959us 4 20 20.00
V2S shadowed_reset_glitch keymgr_dpe_shadow_reg_errors 3.610s 344.959us 4 20 20.00
V2S shadow_reg_update_error_with_csr_rw keymgr_dpe_shadow_reg_errors_with_csr_rw 5.680s 832.732us 6 20 30.00
V2S prim_count_check keymgr_dpe_sec_cm 11.960s 3.310ms 5 5 100.00
V2S prim_fsm_check keymgr_dpe_sec_cm 11.960s 3.310ms 5 5 100.00
V2S TOTAL 35 65 53.85
TOTAL 269 310 86.77

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
77.09 97.57 90.70 63.14 76.92 94.89 98.56 17.87

Failure Buckets