9464f06a4d| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | aon_timer_smoke | 3.240s | 514.304us | 5 | 5 | 100.00 |
| V1 | csr_hw_reset | aon_timer_csr_hw_reset | 3.510s | 713.532us | 5 | 5 | 100.00 |
| V1 | csr_rw | aon_timer_csr_rw | 2.950s | 506.943us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | aon_timer_csr_bit_bash | 14.550s | 10.544ms | 5 | 5 | 100.00 |
| V1 | csr_aliasing | aon_timer_csr_aliasing | 3.360s | 635.867us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | aon_timer_csr_mem_rw_with_rand_reset | 3.360s | 408.924us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | aon_timer_csr_rw | 2.950s | 506.943us | 20 | 20 | 100.00 |
| aon_timer_csr_aliasing | 3.360s | 635.867us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | aon_timer_mem_walk | 2.890s | 329.679us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | aon_timer_mem_partial_access | 2.690s | 362.560us | 5 | 5 | 100.00 |
| V1 | TOTAL | 70 | 70 | 100.00 | |||
| V2 | prescaler | aon_timer_prescaler | 1.384m | 57.900ms | 15 | 15 | 100.00 |
| V2 | jump | aon_timer_jump | 3.340s | 706.253us | 5 | 5 | 100.00 |
| V2 | stress_all | aon_timer_stress_all | 1.511m | 72.866ms | 15 | 15 | 100.00 |
| V2 | intr_test | aon_timer_intr_test | 2.910s | 439.323us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | aon_timer_tl_errors | 4.340s | 598.817us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | aon_timer_tl_errors | 4.340s | 598.817us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | aon_timer_csr_hw_reset | 3.510s | 713.532us | 5 | 5 | 100.00 |
| aon_timer_csr_rw | 2.950s | 506.943us | 20 | 20 | 100.00 | ||
| aon_timer_csr_aliasing | 3.360s | 635.867us | 5 | 5 | 100.00 | ||
| aon_timer_same_csr_outstanding | 5.970s | 2.319ms | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | aon_timer_csr_hw_reset | 3.510s | 713.532us | 5 | 5 | 100.00 |
| aon_timer_csr_rw | 2.950s | 506.943us | 20 | 20 | 100.00 | ||
| aon_timer_csr_aliasing | 3.360s | 635.867us | 5 | 5 | 100.00 | ||
| aon_timer_same_csr_outstanding | 5.970s | 2.319ms | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 125 | 125 | 100.00 | |||
| V2S | tl_intg_err | aon_timer_sec_cm | 12.200s | 8.710ms | 5 | 5 | 100.00 |
| aon_timer_tl_intg_err | 20.100s | 15.364ms | 16 | 20 | 80.00 | ||
| V2S | sec_cm_bus_integrity | aon_timer_tl_intg_err | 20.100s | 15.364ms | 16 | 20 | 80.00 |
| V2S | TOTAL | 21 | 25 | 84.00 | |||
| V3 | max_threshold | aon_timer_smoke_max_thold | 3.110s | 739.089us | 5 | 5 | 100.00 |
| V3 | min_threshold | aon_timer_smoke_min_thold | 3.750s | 714.316us | 5 | 5 | 100.00 |
| V3 | wkup_count_hi_cdc | aon_timer_wkup_count_cdc_hi | 10.430s | 3.713ms | 5 | 5 | 100.00 |
| V3 | custom_intr | aon_timer_custom_intr | 3.150s | 675.764us | 10 | 10 | 100.00 |
| V3 | alternating_on_off | aon_timer_alternating_enable_on_off | 11.160s | 4.204ms | 4 | 5 | 80.00 |
| V3 | stress_all_with_rand_reset | aon_timer_stress_all_with_rand_reset | 28.030s | 11.900ms | 15 | 15 | 100.00 |
| V3 | TOTAL | 44 | 45 | 97.78 | |||
| Unmapped tests | aon_timer_alert_test | 3.230s | 430.918us | 50 | 50 | 100.00 | |
| TOTAL | 310 | 315 | 98.41 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 95.76 | 99.92 | 99.88 | 74.91 | -- | 99.82 | 100.00 | 100.00 |
UVM_FATAL (cip_base_vseq.sv:665) [aon_timer_common_vseq] timeout wait for alert handshake:fatal_fault has 4 failures:
0.aon_timer_tl_intg_err.15928891452634729870046806905481410409097184567873641360747691991915331878403
Line 182, in log /nightly/runs/scratch/dj-sw-nightly/aon_timer-sim-vcs/0.aon_timer_tl_intg_err/latest/run.log
UVM_FATAL @ 14995553195 ps: (cip_base_vseq.sv:665) [uvm_test_top.env.virtual_sequencer.aon_timer_common_vseq] timeout wait for alert handshake:fatal_fault
UVM_INFO @ 14995553195 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.aon_timer_tl_intg_err.98051839995707932926394142133399285664647903188352972851439114402731185572516
Line 126, in log /nightly/runs/scratch/dj-sw-nightly/aon_timer-sim-vcs/1.aon_timer_tl_intg_err/latest/run.log
UVM_FATAL @ 12447094895 ps: (cip_base_vseq.sv:665) [uvm_test_top.env.virtual_sequencer.aon_timer_common_vseq] timeout wait for alert handshake:fatal_fault
UVM_INFO @ 12447094895 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_ERROR (aon_timer_scoreboard.sv:1337) [scoreboard] Check failed wdog_rst_req_exp === cfg.aon_intr_vif.sample_pin(.idx(0)) (* [*] vs * [*]) has 1 failures:
4.aon_timer_alternating_enable_on_off.64286984849724006168345955653133511395393948708045974307276578299874265179654
Line 73, in log /nightly/runs/scratch/dj-sw-nightly/aon_timer-sim-vcs/4.aon_timer_alternating_enable_on_off/latest/run.log
UVM_ERROR @ 753608472 ps: (aon_timer_scoreboard.sv:1337) [uvm_test_top.env.scoreboard] Check failed wdog_rst_req_exp === cfg.aon_intr_vif.sample_pin(.idx(0)) (0x1 [1] vs 0x0 [0])
UVM_INFO @ 753608472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---