KEYMGR_DPE Simulation Results

Friday March 14 2025 17:31:47 UTC

GitHub Revision: 9464f06a4d

Branch: dj-sw-nightly

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke keymgr_dpe_smoke 1.501m 7.812ms 47 50 94.00
V1 csr_hw_reset keymgr_dpe_csr_hw_reset 2.450s 87.257us 5 5 100.00
V1 csr_rw keymgr_dpe_csr_rw 2.530s 13.698us 20 20 100.00
V1 csr_bit_bash keymgr_dpe_csr_bit_bash 7.720s 742.605us 5 5 100.00
V1 csr_aliasing keymgr_dpe_csr_aliasing 5.950s 651.195us 5 5 100.00
V1 csr_mem_rw_with_rand_reset keymgr_dpe_csr_mem_rw_with_rand_reset 3.120s 44.542us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr keymgr_dpe_csr_rw 2.530s 13.698us 20 20 100.00
keymgr_dpe_csr_aliasing 5.950s 651.195us 5 5 100.00
V1 TOTAL 102 105 97.14
V2 intr_test keymgr_dpe_intr_test 2.500s 10.051us 50 50 100.00
V2 alert_test keymgr_dpe_alert_test 2.600s 57.248us 50 50 100.00
V2 tl_d_oob_addr_access keymgr_dpe_tl_errors 4.250s 150.377us 20 20 100.00
V2 tl_d_illegal_access keymgr_dpe_tl_errors 4.250s 150.377us 20 20 100.00
V2 tl_d_outstanding_access keymgr_dpe_csr_hw_reset 2.450s 87.257us 5 5 100.00
keymgr_dpe_csr_rw 2.530s 13.698us 20 20 100.00
keymgr_dpe_csr_aliasing 5.950s 651.195us 5 5 100.00
keymgr_dpe_same_csr_outstanding 3.920s 373.424us 20 20 100.00
V2 tl_d_partial_access keymgr_dpe_csr_hw_reset 2.450s 87.257us 5 5 100.00
keymgr_dpe_csr_rw 2.530s 13.698us 20 20 100.00
keymgr_dpe_csr_aliasing 5.950s 651.195us 5 5 100.00
keymgr_dpe_same_csr_outstanding 3.920s 373.424us 20 20 100.00
V2 TOTAL 140 140 100.00
V2S tl_intg_err keymgr_dpe_sec_cm 17.470s 1.222ms 5 5 100.00
keymgr_dpe_tl_intg_err 7.470s 847.017us 20 20 100.00
V2S shadow_reg_update_error keymgr_dpe_shadow_reg_errors 3.700s 98.327us 7 20 35.00
V2S shadow_reg_read_clear_staged_value keymgr_dpe_shadow_reg_errors 3.700s 98.327us 7 20 35.00
V2S shadow_reg_storage_error keymgr_dpe_shadow_reg_errors 3.700s 98.327us 7 20 35.00
V2S shadowed_reset_glitch keymgr_dpe_shadow_reg_errors 3.700s 98.327us 7 20 35.00
V2S shadow_reg_update_error_with_csr_rw keymgr_dpe_shadow_reg_errors_with_csr_rw 6.020s 238.123us 5 20 25.00
V2S prim_count_check keymgr_dpe_sec_cm 17.470s 1.222ms 5 5 100.00
V2S prim_fsm_check keymgr_dpe_sec_cm 17.470s 1.222ms 5 5 100.00
V2S TOTAL 37 65 56.92
TOTAL 279 310 90.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
77.02 97.57 90.61 63.01 76.92 94.89 98.56 17.60

Failure Buckets