056762e2b4| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | keymgr_smoke | 32.550s | 5.635ms | 50 | 50 | 100.00 |
| V1 | random | keymgr_random | 33.530s | 1.599ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | keymgr_csr_hw_reset | 2.270s | 70.294us | 5 | 5 | 100.00 |
| V1 | csr_rw | keymgr_csr_rw | 2.490s | 50.529us | 18 | 20 | 90.00 |
| V1 | csr_bit_bash | keymgr_csr_bit_bash | 11.050s | 2.127ms | 2 | 5 | 40.00 |
| V1 | csr_aliasing | keymgr_csr_aliasing | 8.170s | 1.712ms | 3 | 5 | 60.00 |
| V1 | csr_mem_rw_with_rand_reset | keymgr_csr_mem_rw_with_rand_reset | 3.350s | 211.405us | 16 | 20 | 80.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | keymgr_csr_rw | 2.490s | 50.529us | 18 | 20 | 90.00 |
| keymgr_csr_aliasing | 8.170s | 1.712ms | 3 | 5 | 60.00 | ||
| V1 | TOTAL | 144 | 155 | 92.90 | |||
| V2 | cfgen_during_op | keymgr_cfg_regwen | 1.304m | 8.051ms | 49 | 50 | 98.00 |
| V2 | sideload | keymgr_sideload | 51.210s | 11.788ms | 50 | 50 | 100.00 |
| keymgr_sideload_kmac | 46.610s | 3.129ms | 50 | 50 | 100.00 | ||
| keymgr_sideload_aes | 39.390s | 5.371ms | 49 | 50 | 98.00 | ||
| keymgr_sideload_otbn | 28.030s | 1.267ms | 50 | 50 | 100.00 | ||
| V2 | direct_to_disabled_state | keymgr_direct_to_disabled | 16.310s | 3.104ms | 50 | 50 | 100.00 |
| V2 | lc_disable | keymgr_lc_disable | 32.580s | 2.822ms | 49 | 50 | 98.00 |
| V2 | kmac_error_response | keymgr_kmac_rsp_err | 9.770s | 468.461us | 28 | 50 | 56.00 |
| V2 | invalid_sw_input | keymgr_sw_invalid_input | 54.330s | 6.767ms | 49 | 50 | 98.00 |
| V2 | invalid_hw_input | keymgr_hwsw_invalid_input | 1.160m | 9.662ms | 49 | 50 | 98.00 |
| V2 | sync_async_fault_cross | keymgr_sync_async_fault_cross | 13.740s | 2.857ms | 41 | 50 | 82.00 |
| V2 | stress_all | keymgr_stress_all | 2.168m | 36.318ms | 44 | 50 | 88.00 |
| V2 | intr_test | keymgr_intr_test | 2.170s | 9.082us | 50 | 50 | 100.00 |
| V2 | alert_test | keymgr_alert_test | 2.480s | 88.458us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | keymgr_tl_errors | 6.240s | 575.252us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | keymgr_tl_errors | 6.240s | 575.252us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | keymgr_csr_hw_reset | 2.270s | 70.294us | 5 | 5 | 100.00 |
| keymgr_csr_rw | 2.490s | 50.529us | 18 | 20 | 90.00 | ||
| keymgr_csr_aliasing | 8.170s | 1.712ms | 3 | 5 | 60.00 | ||
| keymgr_same_csr_outstanding | 3.550s | 75.976us | 12 | 20 | 60.00 | ||
| V2 | tl_d_partial_access | keymgr_csr_hw_reset | 2.270s | 70.294us | 5 | 5 | 100.00 |
| keymgr_csr_rw | 2.490s | 50.529us | 18 | 20 | 90.00 | ||
| keymgr_csr_aliasing | 8.170s | 1.712ms | 3 | 5 | 60.00 | ||
| keymgr_same_csr_outstanding | 3.550s | 75.976us | 12 | 20 | 60.00 | ||
| V2 | TOTAL | 690 | 740 | 93.24 | |||
| V2S | sec_cm_additional_check | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | tl_intg_err | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| keymgr_tl_intg_err | 7.510s | 1.501ms | 14 | 20 | 70.00 | ||
| V2S | shadow_reg_update_error | keymgr_shadow_reg_errors | 5.020s | 300.415us | 4 | 20 | 20.00 |
| V2S | shadow_reg_read_clear_staged_value | keymgr_shadow_reg_errors | 5.020s | 300.415us | 4 | 20 | 20.00 |
| V2S | shadow_reg_storage_error | keymgr_shadow_reg_errors | 5.020s | 300.415us | 4 | 20 | 20.00 |
| V2S | shadowed_reset_glitch | keymgr_shadow_reg_errors | 5.020s | 300.415us | 4 | 20 | 20.00 |
| V2S | shadow_reg_update_error_with_csr_rw | keymgr_shadow_reg_errors_with_csr_rw | 8.910s | 1.592ms | 3 | 20 | 15.00 |
| V2S | prim_count_check | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | prim_fsm_check | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | sec_cm_bus_integrity | keymgr_tl_intg_err | 7.510s | 1.501ms | 14 | 20 | 70.00 |
| V2S | sec_cm_config_shadow | keymgr_shadow_reg_errors | 5.020s | 300.415us | 4 | 20 | 20.00 |
| V2S | sec_cm_op_config_regwen | keymgr_cfg_regwen | 1.304m | 8.051ms | 49 | 50 | 98.00 |
| V2S | sec_cm_reseed_config_regwen | keymgr_random | 33.530s | 1.599ms | 50 | 50 | 100.00 |
| keymgr_csr_rw | 2.490s | 50.529us | 18 | 20 | 90.00 | ||
| V2S | sec_cm_sw_binding_config_regwen | keymgr_random | 33.530s | 1.599ms | 50 | 50 | 100.00 |
| keymgr_csr_rw | 2.490s | 50.529us | 18 | 20 | 90.00 | ||
| V2S | sec_cm_max_key_ver_config_regwen | keymgr_random | 33.530s | 1.599ms | 50 | 50 | 100.00 |
| keymgr_csr_rw | 2.490s | 50.529us | 18 | 20 | 90.00 | ||
| V2S | sec_cm_lc_ctrl_intersig_mubi | keymgr_lc_disable | 32.580s | 2.822ms | 49 | 50 | 98.00 |
| V2S | sec_cm_constants_consistency | keymgr_hwsw_invalid_input | 1.160m | 9.662ms | 49 | 50 | 98.00 |
| V2S | sec_cm_intersig_consistency | keymgr_hwsw_invalid_input | 1.160m | 9.662ms | 49 | 50 | 98.00 |
| V2S | sec_cm_hw_key_sw_noaccess | keymgr_random | 33.530s | 1.599ms | 50 | 50 | 100.00 |
| V2S | sec_cm_output_keys_ctrl_redun | keymgr_sideload_protect | 16.760s | 1.116ms | 50 | 50 | 100.00 |
| V2S | sec_cm_ctrl_fsm_sparse | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | sec_cm_data_fsm_sparse | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | sec_cm_ctrl_fsm_local_esc | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | sec_cm_ctrl_fsm_consistency | keymgr_custom_cm | 23.890s | 10.317ms | 30 | 50 | 60.00 |
| V2S | sec_cm_ctrl_fsm_global_esc | keymgr_lc_disable | 32.580s | 2.822ms | 49 | 50 | 98.00 |
| V2S | sec_cm_ctrl_ctr_redun | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | sec_cm_kmac_if_fsm_sparse | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | sec_cm_kmac_if_ctr_redun | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | sec_cm_kmac_if_cmd_ctrl_consistency | keymgr_custom_cm | 23.890s | 10.317ms | 30 | 50 | 60.00 |
| V2S | sec_cm_kmac_if_done_ctrl_consistency | keymgr_custom_cm | 23.890s | 10.317ms | 30 | 50 | 60.00 |
| V2S | sec_cm_reseed_ctr_redun | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | sec_cm_side_load_sel_ctrl_consistency | keymgr_custom_cm | 23.890s | 10.317ms | 30 | 50 | 60.00 |
| V2S | sec_cm_sideload_ctrl_fsm_sparse | keymgr_sec_cm | 16.110s | 461.034us | 5 | 5 | 100.00 |
| V2S | sec_cm_ctrl_key_integrity | keymgr_custom_cm | 23.890s | 10.317ms | 30 | 50 | 60.00 |
| V2S | TOTAL | 106 | 165 | 64.24 | |||
| V3 | stress_all_with_rand_reset | keymgr_stress_all_with_rand_reset | 21.210s | 3.025ms | 23 | 50 | 46.00 |
| V3 | TOTAL | 23 | 50 | 46.00 | |||
| TOTAL | 963 | 1110 | 86.76 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 97.41 | 99.06 | 98.03 | 98.32 | 97.67 | 98.93 | 98.63 | 91.21 |
UVM_FATAL (alert_receiver_driver.sv:145) [driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q has 28 failures:
0.keymgr_shadow_reg_errors.495544664400303854964163416856902825305836014210093299986384789642878924238
Line 101, in log /nightly/runs/scratch/master/keymgr-sim-vcs/0.keymgr_shadow_reg_errors/latest/run.log
UVM_FATAL @ 443594634 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 443594634 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.keymgr_shadow_reg_errors.72630048840153127007455669626779278861909387057209400198009710843545688648579
Line 97, in log /nightly/runs/scratch/master/keymgr-sim-vcs/1.keymgr_shadow_reg_errors/latest/run.log
UVM_FATAL @ 68748947 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 68748947 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 14 more failures.
1.keymgr_shadow_reg_errors_with_csr_rw.89378122449315316392902716562799080667176956835435464646525327448155500641529
Line 83, in log /nightly/runs/scratch/master/keymgr-sim-vcs/1.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_FATAL @ 28964602 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 28964602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.keymgr_shadow_reg_errors_with_csr_rw.111017358582924835847759797980003782969542345300771051286140346462797711424890
Line 99, in log /nightly/runs/scratch/master/keymgr-sim-vcs/2.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_FATAL @ 298140393 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
UVM_INFO @ 298140393 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 10 more failures.
Offending '(d2h.d_error || ((d2h.d_data & *) == (exp_vals[*] & *)))' has 27 failures:
Test keymgr_same_csr_outstanding has 8 failures.
0.keymgr_same_csr_outstanding.2837308135999249607272636025963132319870254274316089780467977521450894291473
Line 78, in log /nightly/runs/scratch/master/keymgr-sim-vcs/0.keymgr_same_csr_outstanding/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[20] & 'hffffffff)))'
UVM_ERROR @ 63010562 ps: (keymgr_csr_assert_fpv.sv:466) [ASSERT FAILED] attest_sw_binding_7_rd_A
UVM_INFO @ 63010562 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
5.keymgr_same_csr_outstanding.92158986091380522269278866227301752119941732721580916799991497507258610642455
Line 76, in log /nightly/runs/scratch/master/keymgr-sim-vcs/5.keymgr_same_csr_outstanding/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[17] & 'hffffffff)))'
UVM_ERROR @ 14771986 ps: (keymgr_csr_assert_fpv.sv:451) [ASSERT FAILED] attest_sw_binding_4_rd_A
UVM_INFO @ 14771986 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 6 more failures.
Test keymgr_csr_bit_bash has 3 failures.
1.keymgr_csr_bit_bash.108255297268743910021211011034207538974169319348038650433178430991249647897664
Line 76, in log /nightly/runs/scratch/master/keymgr-sim-vcs/1.keymgr_csr_bit_bash/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[14] & 'hffffffff)))'
UVM_ERROR @ 2127101381 ps: (keymgr_csr_assert_fpv.sv:436) [ASSERT FAILED] attest_sw_binding_1_rd_A
UVM_INFO @ 2127101381 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.keymgr_csr_bit_bash.77303903254297439065898415126317693860011627826769185974421460499271965330952
Line 76, in log /nightly/runs/scratch/master/keymgr-sim-vcs/2.keymgr_csr_bit_bash/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[18] & 'hffffffff)))'
UVM_ERROR @ 4466640270 ps: (keymgr_csr_assert_fpv.sv:456) [ASSERT FAILED] attest_sw_binding_5_rd_A
UVM_INFO @ 4466640270 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
Test keymgr_csr_mem_rw_with_rand_reset has 4 failures.
1.keymgr_csr_mem_rw_with_rand_reset.42884663077999969263034948243439679669894157907651936972478320201736573349465
Line 77, in log /nightly/runs/scratch/master/keymgr-sim-vcs/1.keymgr_csr_mem_rw_with_rand_reset/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[13] & 'hffffffff)))'
UVM_ERROR @ 105378566 ps: (keymgr_csr_assert_fpv.sv:431) [ASSERT FAILED] attest_sw_binding_0_rd_A
UVM_INFO @ 105378566 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.keymgr_csr_mem_rw_with_rand_reset.54431671735437318123883912533167730548409412231835470207972917773854880193640
Line 85, in log /nightly/runs/scratch/master/keymgr-sim-vcs/4.keymgr_csr_mem_rw_with_rand_reset/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[14] & 'hffffffff)))'
UVM_ERROR @ 32037240 ps: (keymgr_csr_assert_fpv.sv:436) [ASSERT FAILED] attest_sw_binding_1_rd_A
UVM_INFO @ 32037240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
Test keymgr_csr_rw has 2 failures.
2.keymgr_csr_rw.60455188448942260366753899658593586697523151968110823625824044073357021537259
Line 77, in log /nightly/runs/scratch/master/keymgr-sim-vcs/2.keymgr_csr_rw/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[17] & 'hffffffff)))'
UVM_ERROR @ 50528615 ps: (keymgr_csr_assert_fpv.sv:451) [ASSERT FAILED] attest_sw_binding_4_rd_A
UVM_INFO @ 50528615 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
18.keymgr_csr_rw.17771827240868726583796965925047067641091474524303440798861824459264460131011
Line 76, in log /nightly/runs/scratch/master/keymgr-sim-vcs/18.keymgr_csr_rw/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[10] & 'hffffffff)))'
UVM_ERROR @ 47232284 ps: (keymgr_csr_assert_fpv.sv:416) [ASSERT FAILED] sealing_sw_binding_5_rd_A
UVM_INFO @ 47232284 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_csr_aliasing has 2 failures.
2.keymgr_csr_aliasing.81483283213001988108813435254001390013594983875346187252865633229659381181860
Line 76, in log /nightly/runs/scratch/master/keymgr-sim-vcs/2.keymgr_csr_aliasing/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[16] & 'hffffffff)))'
UVM_ERROR @ 326426063 ps: (keymgr_csr_assert_fpv.sv:446) [ASSERT FAILED] attest_sw_binding_3_rd_A
UVM_INFO @ 326426063 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
3.keymgr_csr_aliasing.29583438946853874896092445287932200198533425026972860429409058104685907371227
Line 76, in log /nightly/runs/scratch/master/keymgr-sim-vcs/3.keymgr_csr_aliasing/latest/run.log
Offending '(d2h.d_error || ((d2h.d_data & 'hffffffff) == (exp_vals[8] & 'hffffffff)))'
UVM_ERROR @ 263705036 ps: (keymgr_csr_assert_fpv.sv:406) [ASSERT FAILED] sealing_sw_binding_3_rd_A
UVM_INFO @ 263705036 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more tests.
UVM_ERROR (cip_base_vseq.sv:890) [keymgr_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 25 failures:
1.keymgr_stress_all_with_rand_reset.1877477983843348061102892015041363654420185801202759526209559620608486203852
Line 92, in log /nightly/runs/scratch/master/keymgr-sim-vcs/1.keymgr_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 113647549 ps: (cip_base_vseq.sv:890) [uvm_test_top.env.virtual_sequencer.keymgr_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 113647549 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
3.keymgr_stress_all_with_rand_reset.31139479079743222496606791340118368587137956011621287570215171685197442040215
Line 137, in log /nightly/runs/scratch/master/keymgr-sim-vcs/3.keymgr_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 214275219 ps: (cip_base_vseq.sv:890) [uvm_test_top.env.virtual_sequencer.keymgr_common_vseq] Check failed (!has_outstanding_access()) Waited 10001 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 214275219 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 23 more failures.
UVM_ERROR (cip_base_vseq.sv:969) [keymgr_custom_cm_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault_err does not trigger! has 19 failures:
1.keymgr_custom_cm.15558549938419618937920099727042989130272389911680341973213204842464483901515
Line 178, in log /nightly/runs/scratch/master/keymgr-sim-vcs/1.keymgr_custom_cm/latest/run.log
UVM_ERROR @ 79320583 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_custom_cm_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 79320583 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.keymgr_custom_cm.114939109231866086240244735881423494808160616523998535466835176997806053768958
Line 331, in log /nightly/runs/scratch/master/keymgr-sim-vcs/4.keymgr_custom_cm/latest/run.log
UVM_ERROR @ 284655119 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_custom_cm_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 284655119 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 17 more failures.
UVM_ERROR (cip_base_scoreboard.sv:327) scoreboard [scoreboard] alert fatal_fault_err did not trigger max_delay:* has 16 failures:
0.keymgr_kmac_rsp_err.112574297844783338943027908210971611727999918017531432325979267197200284659373
Line 375, in log /nightly/runs/scratch/master/keymgr-sim-vcs/0.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 247700577 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault_err did not trigger max_delay:0
UVM_INFO @ 247700577 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.keymgr_kmac_rsp_err.64744727354947780802846045000028785726296923482462424730364321957299545988227
Line 452, in log /nightly/runs/scratch/master/keymgr-sim-vcs/2.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 63478141 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault_err did not trigger max_delay:0
UVM_INFO @ 63478141 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 14 more failures.
UVM_ERROR (cip_base_scoreboard.sv:327) scoreboard [scoreboard] alert recov_operation_err did not trigger max_delay:* has 13 failures:
Test keymgr_stress_all has 6 failures.
0.keymgr_stress_all.32476342724632903906593806622882803187928218703405722112000846885432193004428
Line 800, in log /nightly/runs/scratch/master/keymgr-sim-vcs/0.keymgr_stress_all/latest/run.log
UVM_ERROR @ 267211359 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 267211359 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
4.keymgr_stress_all.33259135470837995595529956736987201363690626066263101975355930048410499714023
Line 2557, in log /nightly/runs/scratch/master/keymgr-sim-vcs/4.keymgr_stress_all/latest/run.log
UVM_ERROR @ 1526359088 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 1526359088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 4 more failures.
Test keymgr_kmac_rsp_err has 4 failures.
8.keymgr_kmac_rsp_err.81776823553295763871200082422735826931501684545306001190564390763203379634324
Line 265, in log /nightly/runs/scratch/master/keymgr-sim-vcs/8.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 30494302 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 30494302 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
37.keymgr_kmac_rsp_err.33825394209216207434729747084691641234328241604190075332578595290893491972563
Line 586, in log /nightly/runs/scratch/master/keymgr-sim-vcs/37.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 31411493 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 31411493 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
Test keymgr_stress_all_with_rand_reset has 2 failures.
31.keymgr_stress_all_with_rand_reset.70118624246494579186171032864890729197640346326779314418144125001952120582771
Line 1405, in log /nightly/runs/scratch/master/keymgr-sim-vcs/31.keymgr_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 6601678942 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 6601678942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
43.keymgr_stress_all_with_rand_reset.92108417688850737324446559611246541922792078575279580274564627013272289733375
Line 160, in log /nightly/runs/scratch/master/keymgr-sim-vcs/43.keymgr_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 56952865 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 56952865 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_sideload_aes has 1 failures.
47.keymgr_sideload_aes.49652983760578757645607234741717073318749887690836102192732468476587815348962
Line 96, in log /nightly/runs/scratch/master/keymgr-sim-vcs/47.keymgr_sideload_aes/latest/run.log
UVM_ERROR @ 55838953 ps: (cip_base_scoreboard.sv:327) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err did not trigger max_delay:0
UVM_INFO @ 55838953 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:969) [keymgr_sync_async_fault_cross_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault_err does not trigger! has 9 failures:
0.keymgr_sync_async_fault_cross.86583965159845477774524677572239905619401702635160972664714505618389384692843
Line 113, in log /nightly/runs/scratch/master/keymgr-sim-vcs/0.keymgr_sync_async_fault_cross/latest/run.log
UVM_ERROR @ 115323639 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_sync_async_fault_cross_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 115323639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
8.keymgr_sync_async_fault_cross.84173055726292971867641499656396804422614926618726376010531290628821160443873
Line 128, in log /nightly/runs/scratch/master/keymgr-sim-vcs/8.keymgr_sync_async_fault_cross/latest/run.log
UVM_ERROR @ 48542096 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_sync_async_fault_cross_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 48542096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 7 more failures.
UVM_ERROR (cip_base_vseq.sv:969) [keymgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault_err does not trigger! has 3 failures:
0.keymgr_shadow_reg_errors_with_csr_rw.103969869996842567765761587859377806069545881098709086034054355164571195232775
Line 78, in log /nightly/runs/scratch/master/keymgr-sim-vcs/0.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_ERROR @ 320565725 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 320565725 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
6.keymgr_shadow_reg_errors_with_csr_rw.32431922677179952641914543500969810360977689645349891981824904334712558674487
Line 86, in log /nightly/runs/scratch/master/keymgr-sim-vcs/6.keymgr_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_ERROR @ 81113594 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
UVM_INFO @ 81113594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_ERROR (cip_base_scoreboard.sv:249) scoreboard [scoreboard] alert recov_operation_err has unexpected timeout error has 3 failures:
Test keymgr_sw_invalid_input has 1 failures.
20.keymgr_sw_invalid_input.55678187337224105864116019464267640593613555534364101660330034444818410754225
Line 145, in log /nightly/runs/scratch/master/keymgr-sim-vcs/20.keymgr_sw_invalid_input/latest/run.log
UVM_ERROR @ 18965815 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err has unexpected timeout error
UVM_INFO @ 18965815 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_hwsw_invalid_input has 1 failures.
47.keymgr_hwsw_invalid_input.2272043175361298815648106046071191510308584727265635997848172158377958070910
Line 282, in log /nightly/runs/scratch/master/keymgr-sim-vcs/47.keymgr_hwsw_invalid_input/latest/run.log
UVM_ERROR @ 22653060 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err has unexpected timeout error
UVM_INFO @ 22653060 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test keymgr_cfg_regwen has 1 failures.
49.keymgr_cfg_regwen.58400490629003586221106546680254253571125091727720342764924382110722125448694
Line 286, in log /nightly/runs/scratch/master/keymgr-sim-vcs/49.keymgr_cfg_regwen/latest/run.log
UVM_ERROR @ 27212927 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err has unexpected timeout error
UVM_INFO @ 27212927 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_scoreboard.sv:249) scoreboard [scoreboard] alert fatal_fault_err has unexpected timeout error has 2 failures:
39.keymgr_kmac_rsp_err.9509334568877671907327258015238126712696719054298765984462050318410721326179
Line 285, in log /nightly/runs/scratch/master/keymgr-sim-vcs/39.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 265417585 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault_err has unexpected timeout error
UVM_INFO @ 265417585 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
44.keymgr_kmac_rsp_err.1615035516659012738030773203703109764300483764181187895590491247294014470782
Line 261, in log /nightly/runs/scratch/master/keymgr-sim-vcs/44.keymgr_kmac_rsp_err/latest/run.log
UVM_ERROR @ 30282469 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert fatal_fault_err has unexpected timeout error
UVM_INFO @ 30282469 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (keymgr_custom_cm_vseq.sv:37) [keymgr_custom_cm_vseq] wait timeout occurred! has 1 failures:
0.keymgr_custom_cm.10747065554834059000531754059422662467975894101025079580005701180249294581235
Line 219, in log /nightly/runs/scratch/master/keymgr-sim-vcs/0.keymgr_custom_cm/latest/run.log
UVM_FATAL @ 10317030514 ps: (keymgr_custom_cm_vseq.sv:37) [uvm_test_top.env.virtual_sequencer.keymgr_custom_cm_vseq] wait timeout occurred!
UVM_INFO @ 10317030514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (keymgr_scoreboard.sv:766) [scoreboard] Check failed item.d_data != gmv(csr) (* [] vs * []) reg name: keymgr_reg_block.sw_share1_output_*` has 1 failures:
17.keymgr_lc_disable.104456782755022399401695862303388994788143413864106844291491293475794461892935
Line 120, in log /nightly/runs/scratch/master/keymgr-sim-vcs/17.keymgr_lc_disable/latest/run.log
UVM_ERROR @ 127519412 ps: (keymgr_scoreboard.sv:766) [uvm_test_top.env.scoreboard] Check failed item.d_data != `gmv(csr) (0 [0x0] vs 0 [0x0]) reg name: keymgr_reg_block.sw_share1_output_1
UVM_INFO @ 127519412 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---