KEYMGR_DPE Simulation Results

Sunday March 30 2025 00:05:47 UTC

GitHub Revision: `056762e2b4`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_dpe_smoke	1.814m	34.020ms	48	50	96.00
V1	csr_hw_reset	keymgr_dpe_csr_hw_reset	2.540s	55.970us	5	5	100.00
V1	csr_rw	keymgr_dpe_csr_rw	2.600s	35.856us	20	20	100.00
V1	csr_bit_bash	keymgr_dpe_csr_bit_bash	17.710s	868.501us	5	5	100.00
V1	csr_aliasing	keymgr_dpe_csr_aliasing	10.510s	267.154us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	keymgr_dpe_csr_mem_rw_with_rand_reset	3.760s	221.547us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_dpe_csr_rw	2.600s	35.856us	20	20	100.00
		keymgr_dpe_csr_aliasing	10.510s	267.154us	5	5	100.00
V1		TOTAL			103	105	98.10
V2	intr_test	keymgr_dpe_intr_test	2.540s	20.405us	50	50	100.00
V2	alert_test	keymgr_dpe_alert_test	2.420s	34.772us	50	50	100.00
V2	tl_d_oob_addr_access	keymgr_dpe_tl_errors	7.650s	734.302us	20	20	100.00
V2	tl_d_illegal_access	keymgr_dpe_tl_errors	7.650s	734.302us	20	20	100.00
V2	tl_d_outstanding_access	keymgr_dpe_csr_hw_reset	2.540s	55.970us	5	5	100.00
		keymgr_dpe_csr_rw	2.600s	35.856us	20	20	100.00
		keymgr_dpe_csr_aliasing	10.510s	267.154us	5	5	100.00
		keymgr_dpe_same_csr_outstanding	23.800s	10.259ms	18	20	90.00
V2	tl_d_partial_access	keymgr_dpe_csr_hw_reset	2.540s	55.970us	5	5	100.00
		keymgr_dpe_csr_rw	2.600s	35.856us	20	20	100.00
		keymgr_dpe_csr_aliasing	10.510s	267.154us	5	5	100.00
		keymgr_dpe_same_csr_outstanding	23.800s	10.259ms	18	20	90.00
V2		TOTAL			138	140	98.57
V2S	tl_intg_err	keymgr_dpe_sec_cm	18.800s	2.945ms	5	5	100.00
		keymgr_dpe_tl_intg_err	7.740s	425.666us	20	20	100.00
V2S	shadow_reg_update_error	keymgr_dpe_shadow_reg_errors	3.540s	662.102us	10	20	50.00
V2S	shadow_reg_read_clear_staged_value	keymgr_dpe_shadow_reg_errors	3.540s	662.102us	10	20	50.00
V2S	shadow_reg_storage_error	keymgr_dpe_shadow_reg_errors	3.540s	662.102us	10	20	50.00
V2S	shadowed_reset_glitch	keymgr_dpe_shadow_reg_errors	3.540s	662.102us	10	20	50.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_dpe_shadow_reg_errors_with_csr_rw	4.690s	415.585us	1	20	5.00
V2S	prim_count_check	keymgr_dpe_sec_cm	18.800s	2.945ms	5	5	100.00
V2S	prim_fsm_check	keymgr_dpe_sec_cm	18.800s	2.945ms	5	5	100.00
V2S		TOTAL			36	65	55.38
		TOTAL			277	310	89.35

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
77.11	97.57	90.87	63.14	76.92	94.91	98.57	17.75

Failure Buckets

UVM_FATAL (alert_receiver_driver.sv:145) [driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q has 26 failures:

Test keymgr_dpe_shadow_reg_errors_with_csr_rw has 16 failures.

0.keymgr_dpe_shadow_reg_errors_with_csr_rw.69102895953637673218945001200581143256916953028549776263096820942126447923476
Line 77, in log /nightly/runs/scratch/master/keymgr_dpe-sim-vcs/0.keymgr_dpe_shadow_reg_errors_with_csr_rw/latest/run.log

  UVM_FATAL @  54288966 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
  UVM_INFO @  54288966 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

2.keymgr_dpe_shadow_reg_errors_with_csr_rw.74766658599752467084023986212457658882169257756172005870711389541207267114488
Line 77, in log /nightly/runs/scratch/master/keymgr_dpe-sim-vcs/2.keymgr_dpe_shadow_reg_errors_with_csr_rw/latest/run.log

  UVM_FATAL @ 103778259 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
  UVM_INFO @ 103778259 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 14 more failures.

Test keymgr_dpe_shadow_reg_errors has 10 failures.

2.keymgr_dpe_shadow_reg_errors.98277534545867103978427951638758136429636037381418070277528977243746274283562
Line 91, in log /nightly/runs/scratch/master/keymgr_dpe-sim-vcs/2.keymgr_dpe_shadow_reg_errors/latest/run.log

  UVM_FATAL @ 152700122 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
  UVM_INFO @ 152700122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

3.keymgr_dpe_shadow_reg_errors.22687914216252843771019252965046450076312009062474856543765137307363642442056
Line 83, in log /nightly/runs/scratch/master/keymgr_dpe-sim-vcs/3.keymgr_dpe_shadow_reg_errors/latest/run.log

  UVM_FATAL @  84554355 ps: (alert_receiver_driver.sv:145) [uvm_test_top.env.m_alert_agent_fatal_fault_err.driver] Check failed (cfg.vif.receiver_cb.alert_tx.alert_p) alert_p not high, despite an item in r_alert_rsp_q
  UVM_INFO @  84554355 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

UVM_ERROR (cip_base_vseq.sv:969) [keymgr_dpe_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == * (* [*] vs * [*]) fatal error fatal_fault_err does not trigger! has 3 failures:
- Test keymgr_dpe_shadow_reg_errors_with_csr_rw has 3 failures.
  - 13.keymgr_dpe_shadow_reg_errors_with_csr_rw.34255669367058306095476384070677450185396211856344671890897938106676046855153
    Line 96, in log /nightly/runs/scratch/master/keymgr_dpe-sim-vcs/13.keymgr_dpe_shadow_reg_errors_with_csr_rw/latest/run.log
```
  UVM_ERROR @ 189707499 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_dpe_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
  UVM_INFO @ 189707499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 16.keymgr_dpe_shadow_reg_errors_with_csr_rw.4048471037982229398072830190939811482526935678215570085327688064709782898358
    Line 78, in log /nightly/runs/scratch/master/keymgr_dpe-sim-vcs/16.keymgr_dpe_shadow_reg_errors_with_csr_rw/latest/run.log
```
  UVM_ERROR @  94825769 ps: (cip_base_vseq.sv:969) [uvm_test_top.env.virtual_sequencer.keymgr_dpe_common_vseq] Check failed cfg.m_alert_agent_cfgs[alert_name].vif.get_alert() == 1 (0 [0x0] vs 1 [0x1]) fatal error fatal_fault_err does not trigger!
  UVM_INFO @  94825769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 1 more failures.

UVM_ERROR (cip_base_scoreboard.sv:249) scoreboard [scoreboard] alert recov_operation_err has unexpected timeout error has 2 failures:

Test keymgr_dpe_smoke has 2 failures.

13.keymgr_dpe_smoke.20752888022345576434045117337222300271153307169237863545067865414134397531939
Line 2151, in log /nightly/runs/scratch/master/keymgr_dpe-sim-vcs/13.keymgr_dpe_smoke/latest/run.log

  UVM_ERROR @ 1526707595 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err has unexpected timeout error
  UVM_INFO @ 1526707595 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

34.keymgr_dpe_smoke.21553547028255458797490800176650412832075884101628193809322277586192207354271
Line 535, in log /nightly/runs/scratch/master/keymgr_dpe-sim-vcs/34.keymgr_dpe_smoke/latest/run.log

  UVM_ERROR @ 775993774 ps: (cip_base_scoreboard.sv:249) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] alert recov_operation_err has unexpected timeout error
  UVM_INFO @ 775993774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_FATAL (cip_base_vseq.sv:573) [keymgr_dpe_common_vseq] timeout occurred! has 1 failures:
- Test keymgr_dpe_same_csr_outstanding has 1 failures.
  - 0.keymgr_dpe_same_csr_outstanding.22497935240255173673360346907460644135199968102676708254538750356771744977774
    Line 76, in log /nightly/runs/scratch/master/keymgr_dpe-sim-vcs/0.keymgr_dpe_same_csr_outstanding/latest/run.log
```
  UVM_FATAL @ 10259088480 ps: (cip_base_vseq.sv:573) [uvm_test_top.env.virtual_sequencer.keymgr_dpe_common_vseq] timeout occurred!
  UVM_INFO @ 10259088480 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (cip_base_vseq.sv:293) [keymgr_dpe_common_vseq] Check failed masked_data == exp_data (* [*] vs * [*]) addr * read out mismatch has 1 failures:
- Test keymgr_dpe_same_csr_outstanding has 1 failures.
  - 8.keymgr_dpe_same_csr_outstanding.94313474416095151358913484975751070693614143053444879171546455335473895187412
    Line 79, in log /nightly/runs/scratch/master/keymgr_dpe-sim-vcs/8.keymgr_dpe_same_csr_outstanding/latest/run.log
```
  UVM_ERROR @  45588265 ps: (cip_base_vseq.sv:293) [uvm_test_top.env.virtual_sequencer.keymgr_dpe_common_vseq] Check failed masked_data == exp_data (256 [0x100] vs 0 [0x0]) addr 0xa80805d0 read out mismatch
  UVM_INFO @  45588265 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```