| V1 |
smoke |
aon_timer_smoke |
2.220s |
615.421us |
5 |
5 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.110s |
883.951us |
5 |
5 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
2.240s |
489.867us |
20 |
20 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
14.480s |
7.047ms |
5 |
5 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
3.270s |
709.575us |
5 |
5 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
2.140s |
353.723us |
20 |
20 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
2.240s |
489.867us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
3.270s |
709.575us |
5 |
5 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.980s |
363.613us |
5 |
5 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.840s |
327.433us |
5 |
5 |
100.00 |
| V1 |
|
TOTAL |
|
|
70 |
70 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
49.360s |
44.319ms |
15 |
15 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.290s |
611.475us |
5 |
5 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.284m |
67.806ms |
15 |
15 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
2.230s |
511.255us |
50 |
50 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
3.230s |
522.936us |
20 |
20 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
3.230s |
522.936us |
20 |
20 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.110s |
883.951us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
2.240s |
489.867us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
3.270s |
709.575us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
8.290s |
2.681ms |
20 |
20 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.110s |
883.951us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
2.240s |
489.867us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
3.270s |
709.575us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
8.290s |
2.681ms |
20 |
20 |
100.00 |
| V2 |
|
TOTAL |
|
|
125 |
125 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
10.230s |
7.554ms |
5 |
5 |
100.00 |
|
|
aon_timer_tl_intg_err |
11.900s |
7.744ms |
20 |
20 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
11.900s |
7.744ms |
20 |
20 |
100.00 |
| V2S |
|
TOTAL |
|
|
25 |
25 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
2.120s |
572.215us |
5 |
5 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
2.020s |
583.785us |
5 |
5 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
7.500s |
3.480ms |
5 |
5 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.910s |
653.489us |
10 |
10 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
6.810s |
4.098ms |
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
32.160s |
18.424ms |
15 |
15 |
100.00 |
| V3 |
|
TOTAL |
|
|
45 |
45 |
100.00 |
|
Unmapped tests |
aon_timer_alert_test |
2.110s |
455.711us |
50 |
50 |
100.00 |
|
|
TOTAL |
|
|
315 |
315 |
100.00 |