MBX Simulation Results

Friday April 11 2025 17:39:13 UTC

GitHub Revision: 5d515c3

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 mbx_smoke mbx_smoke 1.633m 11.212ms 2 2 100.00
V1 csr_hw_reset mbx_csr_hw_reset 4.000s 14.550us 5 5 100.00
V1 csr_rw mbx_csr_rw 5.000s 12.849us 20 20 100.00
V1 csr_bit_bash mbx_csr_bit_bash 5.000s 64.328us 5 5 100.00
V1 csr_aliasing mbx_csr_aliasing 4.000s 23.288us 5 5 100.00
V1 csr_mem_rw_with_rand_reset mbx_csr_mem_rw_with_rand_reset 5.000s 1.798us 0 20 0.00
V1 regwen_csr_and_corresponding_lockable_csr mbx_csr_rw 5.000s 12.849us 20 20 100.00
mbx_csr_aliasing 4.000s 23.288us 5 5 100.00
V1 TOTAL 37 57 64.91
V2 mbx_stress mbx_stress 2.033m 3.747ms 2 2 100.00
mbx_stress_zero_delays 1.833m 4.659ms 2 2 100.00
V2 mbx_imbx_oob mbx_imbx_oob 15.000s 870.327us 2 2 100.00
V2 alert_test mbx_alert_test 5.000s 34.590us 50 50 100.00
V2 tl_d_oob_addr_access mbx_tl_errors 5.000s 1.013us 0 20 0.00
V2 tl_d_illegal_access mbx_tl_errors 5.000s 1.013us 0 20 0.00
V2 tl_d_outstanding_access mbx_csr_hw_reset 4.000s 14.550us 5 5 100.00
mbx_csr_rw 5.000s 12.849us 20 20 100.00
mbx_csr_aliasing 4.000s 23.288us 5 5 100.00
mbx_same_csr_outstanding 5.000s 177.360us 20 20 100.00
V2 tl_d_partial_access mbx_csr_hw_reset 4.000s 14.550us 5 5 100.00
mbx_csr_rw 5.000s 12.849us 20 20 100.00
mbx_csr_aliasing 4.000s 23.288us 5 5 100.00
mbx_same_csr_outstanding 5.000s 177.360us 20 20 100.00
V2 TOTAL 76 96 79.17
V2S tl_intg_err mbx_sec_cm 4.000s 29.780us 5 5 100.00
mbx_tl_intg_err 5.000s 6.973us 0 20 0.00
V2S TOTAL 5 25 20.00
TOTAL 118 178 66.29

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
90.54 96.78 92.27 96.67 82.03 85.25 -- 97.08 63.09

Failure Buckets