| V1 |
smoke |
aon_timer_smoke |
2.380s |
479.396us |
5 |
5 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.990s |
701.804us |
5 |
5 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
2.680s |
433.631us |
20 |
20 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
40.030s |
13.981ms |
5 |
5 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
2.680s |
636.067us |
5 |
5 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
3.010s |
489.440us |
20 |
20 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
2.680s |
433.631us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.680s |
636.067us |
5 |
5 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
2.450s |
423.266us |
5 |
5 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
2.390s |
461.174us |
5 |
5 |
100.00 |
| V1 |
|
TOTAL |
|
|
70 |
70 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.330m |
62.018ms |
15 |
15 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.600s |
720.811us |
5 |
5 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
2.866m |
120.919ms |
15 |
15 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
2.810s |
439.913us |
50 |
50 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
4.660s |
494.476us |
20 |
20 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
4.660s |
494.476us |
20 |
20 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.990s |
701.804us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
2.680s |
433.631us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.680s |
636.067us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
6.470s |
3.032ms |
20 |
20 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.990s |
701.804us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
2.680s |
433.631us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.680s |
636.067us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
6.470s |
3.032ms |
20 |
20 |
100.00 |
| V2 |
|
TOTAL |
|
|
125 |
125 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
23.070s |
8.323ms |
5 |
5 |
100.00 |
|
|
aon_timer_tl_intg_err |
12.980s |
8.524ms |
20 |
20 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
12.980s |
8.524ms |
20 |
20 |
100.00 |
| V2S |
|
TOTAL |
|
|
25 |
25 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
3.260s |
635.174us |
5 |
5 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
2.790s |
708.242us |
5 |
5 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
11.630s |
3.454ms |
5 |
5 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
3.660s |
719.978us |
10 |
10 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
20.440s |
4.285ms |
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
49.700s |
21.943ms |
15 |
15 |
100.00 |
| V3 |
|
TOTAL |
|
|
45 |
45 |
100.00 |
|
Unmapped tests |
aon_timer_alert_test |
3.200s |
363.474us |
50 |
50 |
100.00 |
|
|
TOTAL |
|
|
315 |
315 |
100.00 |