| V1 |
smoke |
aon_timer_smoke |
3.350s |
664.703us |
5 |
5 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
4.210s |
876.360us |
5 |
5 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
3.290s |
446.826us |
20 |
20 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
26.400s |
12.829ms |
5 |
5 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
3.150s |
590.509us |
5 |
5 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
3.200s |
397.076us |
20 |
20 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
3.290s |
446.826us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
3.150s |
590.509us |
5 |
5 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
2.740s |
494.308us |
5 |
5 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
2.060s |
380.241us |
5 |
5 |
100.00 |
| V1 |
|
TOTAL |
|
|
70 |
70 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.251m |
40.898ms |
15 |
15 |
100.00 |
| V2 |
jump |
aon_timer_jump |
3.870s |
671.232us |
5 |
5 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
3.378m |
279.372ms |
15 |
15 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
2.910s |
453.689us |
50 |
50 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
4.870s |
506.887us |
20 |
20 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
4.870s |
506.887us |
20 |
20 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
4.210s |
876.360us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
3.290s |
446.826us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
3.150s |
590.509us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
6.450s |
2.702ms |
20 |
20 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
4.210s |
876.360us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
3.290s |
446.826us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
3.150s |
590.509us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
6.450s |
2.702ms |
20 |
20 |
100.00 |
| V2 |
|
TOTAL |
|
|
125 |
125 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
15.140s |
8.535ms |
5 |
5 |
100.00 |
|
|
aon_timer_tl_intg_err |
22.140s |
8.171ms |
20 |
20 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
22.140s |
8.171ms |
20 |
20 |
100.00 |
| V2S |
|
TOTAL |
|
|
25 |
25 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
3.980s |
642.823us |
5 |
5 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
2.890s |
647.092us |
5 |
5 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
12.990s |
3.525ms |
5 |
5 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
3.210s |
579.854us |
10 |
10 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
15.610s |
4.211ms |
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
55.800s |
21.695ms |
15 |
15 |
100.00 |
| V3 |
|
TOTAL |
|
|
45 |
45 |
100.00 |
|
Unmapped tests |
aon_timer_alert_test |
3.370s |
503.677us |
50 |
50 |
100.00 |
|
|
TOTAL |
|
|
315 |
315 |
100.00 |