| V1 |
smoke |
keymgr_dpe_smoke |
2.558m |
70.663ms |
50 |
50 |
100.00 |
| V1 |
csr_hw_reset |
keymgr_dpe_csr_hw_reset |
2.870s |
37.456us |
5 |
5 |
100.00 |
| V1 |
csr_rw |
keymgr_dpe_csr_rw |
2.500s |
83.901us |
20 |
20 |
100.00 |
| V1 |
csr_bit_bash |
keymgr_dpe_csr_bit_bash |
9.560s |
629.333us |
5 |
5 |
100.00 |
| V1 |
csr_aliasing |
keymgr_dpe_csr_aliasing |
9.270s |
229.423us |
5 |
5 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
keymgr_dpe_csr_mem_rw_with_rand_reset |
3.180s |
36.898us |
20 |
20 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
keymgr_dpe_csr_rw |
2.500s |
83.901us |
20 |
20 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
9.270s |
229.423us |
5 |
5 |
100.00 |
| V1 |
|
TOTAL |
|
|
105 |
105 |
100.00 |
| V2 |
intr_test |
keymgr_dpe_intr_test |
2.270s |
25.438us |
50 |
50 |
100.00 |
| V2 |
alert_test |
keymgr_dpe_alert_test |
2.420s |
34.704us |
50 |
50 |
100.00 |
| V2 |
tl_d_oob_addr_access |
keymgr_dpe_tl_errors |
5.940s |
259.303us |
20 |
20 |
100.00 |
| V2 |
tl_d_illegal_access |
keymgr_dpe_tl_errors |
5.940s |
259.303us |
20 |
20 |
100.00 |
| V2 |
tl_d_outstanding_access |
keymgr_dpe_csr_hw_reset |
2.870s |
37.456us |
5 |
5 |
100.00 |
|
|
keymgr_dpe_csr_rw |
2.500s |
83.901us |
20 |
20 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
9.270s |
229.423us |
5 |
5 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
4.180s |
276.546us |
20 |
20 |
100.00 |
| V2 |
tl_d_partial_access |
keymgr_dpe_csr_hw_reset |
2.870s |
37.456us |
5 |
5 |
100.00 |
|
|
keymgr_dpe_csr_rw |
2.500s |
83.901us |
20 |
20 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
9.270s |
229.423us |
5 |
5 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
4.180s |
276.546us |
20 |
20 |
100.00 |
| V2 |
|
TOTAL |
|
|
140 |
140 |
100.00 |
| V2S |
tl_intg_err |
keymgr_dpe_sec_cm |
29.810s |
1.219ms |
5 |
5 |
100.00 |
|
|
keymgr_dpe_tl_intg_err |
8.670s |
352.394us |
20 |
20 |
100.00 |
| V2S |
shadow_reg_update_error |
keymgr_dpe_shadow_reg_errors |
5.370s |
240.723us |
20 |
20 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
keymgr_dpe_shadow_reg_errors |
5.370s |
240.723us |
20 |
20 |
100.00 |
| V2S |
shadow_reg_storage_error |
keymgr_dpe_shadow_reg_errors |
5.370s |
240.723us |
20 |
20 |
100.00 |
| V2S |
shadowed_reset_glitch |
keymgr_dpe_shadow_reg_errors |
5.370s |
240.723us |
20 |
20 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
keymgr_dpe_shadow_reg_errors_with_csr_rw |
7.260s |
799.018us |
20 |
20 |
100.00 |
| V2S |
prim_count_check |
keymgr_dpe_sec_cm |
29.810s |
1.219ms |
5 |
5 |
100.00 |
| V2S |
prim_fsm_check |
keymgr_dpe_sec_cm |
29.810s |
1.219ms |
5 |
5 |
100.00 |
| V2S |
|
TOTAL |
|
|
65 |
65 |
100.00 |
|
|
TOTAL |
|
|
310 |
310 |
100.00 |