AON_TIMER Simulation Results

Friday May 02 2025 17:38:26 UTC

GitHub Revision: c9ef9e5

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	3.400s	704.681us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	3.580s	1.162ms	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	2.700s	466.528us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	20.680s	13.813ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	3.100s	608.070us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	3.040s	494.140us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	2.700s	466.528us	20	20	100.00
		aon_timer_csr_aliasing	3.100s	608.070us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	2.430s	372.720us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	2.340s	422.246us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	1.577m	62.075ms	15	15	100.00
V2	jump	aon_timer_jump	2.550s	571.162us	5	5	100.00
V2	stress_all	aon_timer_stress_all	2.830m	124.115ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	2.980s	505.091us	50	50	100.00
V2	intr_test	aon_timer_intr_test	2.810s	486.572us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	4.190s	539.118us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	4.190s	539.118us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	3.580s	1.162ms	5	5	100.00
		aon_timer_csr_rw	2.700s	466.528us	20	20	100.00
		aon_timer_csr_aliasing	3.100s	608.070us	5	5	100.00
		aon_timer_same_csr_outstanding	6.850s	2.451ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	3.580s	1.162ms	5	5	100.00
		aon_timer_csr_rw	2.700s	466.528us	20	20	100.00
		aon_timer_csr_aliasing	3.100s	608.070us	5	5	100.00
		aon_timer_same_csr_outstanding	6.850s	2.451ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	9.680s	4.482ms	5	5	100.00
		aon_timer_tl_intg_err	16.250s	8.077ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	16.250s	8.077ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	2.770s	455.241us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	2.890s	713.150us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	10.740s	3.996ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	3.050s	658.172us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	18.200s	4.013ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	47.950s	19.862ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.91	100.00	100.00	100.00	--	100.00	100.00	99.48