MBX Simulation Results

Friday May 09 2025 17:39:49 UTC

GitHub Revision: 4c0a27d

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 mbx_smoke mbx_smoke 1.333m 23.994ms 2 2 100.00
V1 csr_hw_reset mbx_csr_hw_reset 4.000s 20.933us 5 5 100.00
V1 csr_rw mbx_csr_rw 4.000s 13.797us 20 20 100.00
V1 csr_bit_bash mbx_csr_bit_bash 5.000s 102.991us 5 5 100.00
V1 csr_aliasing mbx_csr_aliasing 5.000s 18.595us 5 5 100.00
V1 csr_mem_rw_with_rand_reset mbx_csr_mem_rw_with_rand_reset 4.000s 1.075us 0 20 0.00
V1 regwen_csr_and_corresponding_lockable_csr mbx_csr_rw 4.000s 13.797us 20 20 100.00
mbx_csr_aliasing 5.000s 18.595us 5 5 100.00
V1 TOTAL 37 57 64.91
V2 mbx_stress mbx_stress 2.200m 26.572ms 2 2 100.00
mbx_stress_zero_delays 33.000s 7.940ms 2 2 100.00
V2 mbx_imbx_oob mbx_imbx_oob 40.000s 19.973ms 2 2 100.00
V2 alert_test mbx_alert_test 5.000s 24.193us 50 50 100.00
V2 tl_d_oob_addr_access mbx_tl_errors 4.000s 1.021us 0 20 0.00
V2 tl_d_illegal_access mbx_tl_errors 4.000s 1.021us 0 20 0.00
V2 tl_d_outstanding_access mbx_csr_hw_reset 4.000s 20.933us 5 5 100.00
mbx_csr_rw 4.000s 13.797us 20 20 100.00
mbx_csr_aliasing 5.000s 18.595us 5 5 100.00
mbx_same_csr_outstanding 4.000s 15.460us 20 20 100.00
V2 tl_d_partial_access mbx_csr_hw_reset 4.000s 20.933us 5 5 100.00
mbx_csr_rw 4.000s 13.797us 20 20 100.00
mbx_csr_aliasing 5.000s 18.595us 5 5 100.00
mbx_same_csr_outstanding 4.000s 15.460us 20 20 100.00
V2 TOTAL 76 96 79.17
V2S tl_intg_err mbx_sec_cm 4.000s 21.467us 5 5 100.00
mbx_tl_intg_err 4.000s 21.659us 0 20 0.00
V2S TOTAL 5 25 20.00
TOTAL 118 178 66.29

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
90.71 96.95 92.61 96.79 80.03 85.25 -- 98.54 65.23

Failure Buckets