AON_TIMER Simulation Results

Friday May 16 2025 17:35:20 UTC

GitHub Revision: f19c6a3

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	2.550s	756.974us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	3.460s	837.961us	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	2.920s	455.828us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	24.940s	13.669ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	2.750s	491.479us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	3.120s	457.377us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	2.920s	455.828us	20	20	100.00
		aon_timer_csr_aliasing	2.750s	491.479us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	2.440s	463.358us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	2.630s	461.232us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	57.870s	41.451ms	15	15	100.00
V2	jump	aon_timer_jump	3.060s	643.613us	5	5	100.00
V2	stress_all	aon_timer_stress_all	1.853m	89.967ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	3.160s	513.702us	50	50	100.00
V2	intr_test	aon_timer_intr_test	2.840s	435.922us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	3.660s	469.714us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	3.660s	469.714us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	3.460s	837.961us	5	5	100.00
		aon_timer_csr_rw	2.920s	455.828us	20	20	100.00
		aon_timer_csr_aliasing	2.750s	491.479us	5	5	100.00
		aon_timer_same_csr_outstanding	7.490s	2.656ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	3.460s	837.961us	5	5	100.00
		aon_timer_csr_rw	2.920s	455.828us	20	20	100.00
		aon_timer_csr_aliasing	2.750s	491.479us	5	5	100.00
		aon_timer_same_csr_outstanding	7.490s	2.656ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	7.880s	8.310ms	5	5	100.00
		aon_timer_tl_intg_err	15.940s	9.207ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	15.940s	9.207ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	3.420s	473.450us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	3.070s	737.624us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	8.490s	3.440ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	3.440s	629.462us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	15.580s	4.097ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	25.050s	3.967ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
100.00	100.00	100.00	100.00	--	100.00	100.00	100.00