KEYMGR_DPE Simulation Results

Friday May 16 2025 17:35:20 UTC

GitHub Revision: f19c6a3

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_dpe_smoke	3.214m	13.117ms	50	50	100.00
V1	csr_hw_reset	keymgr_dpe_csr_hw_reset	2.460s	25.842us	5	5	100.00
V1	csr_rw	keymgr_dpe_csr_rw	2.940s	104.371us	20	20	100.00
V1	csr_bit_bash	keymgr_dpe_csr_bit_bash	9.830s	889.276us	5	5	100.00
V1	csr_aliasing	keymgr_dpe_csr_aliasing	6.010s	156.152us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	keymgr_dpe_csr_mem_rw_with_rand_reset	3.090s	153.909us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_dpe_csr_rw	2.940s	104.371us	20	20	100.00
		keymgr_dpe_csr_aliasing	6.010s	156.152us	5	5	100.00
V1		TOTAL			105	105	100.00
V2	intr_test	keymgr_dpe_intr_test	2.340s	12.382us	50	50	100.00
V2	alert_test	keymgr_dpe_alert_test	2.670s	41.058us	50	50	100.00
V2	tl_d_oob_addr_access	keymgr_dpe_tl_errors	4.990s	606.971us	20	20	100.00
V2	tl_d_illegal_access	keymgr_dpe_tl_errors	4.990s	606.971us	20	20	100.00
V2	tl_d_outstanding_access	keymgr_dpe_csr_hw_reset	2.460s	25.842us	5	5	100.00
		keymgr_dpe_csr_rw	2.940s	104.371us	20	20	100.00
		keymgr_dpe_csr_aliasing	6.010s	156.152us	5	5	100.00
		keymgr_dpe_same_csr_outstanding	3.990s	350.845us	20	20	100.00
V2	tl_d_partial_access	keymgr_dpe_csr_hw_reset	2.460s	25.842us	5	5	100.00
		keymgr_dpe_csr_rw	2.940s	104.371us	20	20	100.00
		keymgr_dpe_csr_aliasing	6.010s	156.152us	5	5	100.00
		keymgr_dpe_same_csr_outstanding	3.990s	350.845us	20	20	100.00
V2		TOTAL			140	140	100.00
V2S	tl_intg_err	keymgr_dpe_sec_cm	19.960s	1.079ms	5	5	100.00
		keymgr_dpe_tl_intg_err	7.080s	733.589us	20	20	100.00
V2S	shadow_reg_update_error	keymgr_dpe_shadow_reg_errors	4.640s	120.974us	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	keymgr_dpe_shadow_reg_errors	4.640s	120.974us	20	20	100.00
V2S	shadow_reg_storage_error	keymgr_dpe_shadow_reg_errors	4.640s	120.974us	20	20	100.00
V2S	shadowed_reset_glitch	keymgr_dpe_shadow_reg_errors	4.640s	120.974us	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_dpe_shadow_reg_errors_with_csr_rw	7.510s	1.048ms	20	20	100.00
V2S	prim_count_check	keymgr_dpe_sec_cm	19.960s	1.079ms	5	5	100.00
V2S	prim_fsm_check	keymgr_dpe_sec_cm	19.960s	1.079ms	5	5	100.00
V2S		TOTAL			65	65	100.00
		TOTAL			310	310	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
77.08	97.57	90.70	63.14	76.92	94.89	98.57	17.78