AON_TIMER Simulation Results

Friday May 23 2025 17:38:59 UTC

GitHub Revision: 22488a4

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	3.180s	564.533us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	3.720s	1.183ms	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	3.130s	493.447us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	20.230s	13.879ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	2.660s	419.116us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	3.430s	418.925us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	3.130s	493.447us	20	20	100.00
		aon_timer_csr_aliasing	2.660s	419.116us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	2.760s	517.040us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	2.310s	489.865us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	58.630s	39.058ms	15	15	100.00
V2	jump	aon_timer_jump	2.750s	715.826us	5	5	100.00
V2	stress_all	aon_timer_stress_all	1.814m	99.255ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	3.210s	494.060us	50	50	100.00
V2	intr_test	aon_timer_intr_test	2.950s	515.179us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	4.580s	728.024us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	4.580s	728.024us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	3.720s	1.183ms	5	5	100.00
		aon_timer_csr_rw	3.130s	493.447us	20	20	100.00
		aon_timer_csr_aliasing	2.660s	419.116us	5	5	100.00
		aon_timer_same_csr_outstanding	5.860s	2.345ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	3.720s	1.183ms	5	5	100.00
		aon_timer_csr_rw	3.130s	493.447us	20	20	100.00
		aon_timer_csr_aliasing	2.660s	419.116us	5	5	100.00
		aon_timer_same_csr_outstanding	5.860s	2.345ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	14.390s	7.677ms	5	5	100.00
		aon_timer_tl_intg_err	17.270s	8.002ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	17.270s	8.002ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	3.370s	678.561us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	2.770s	679.255us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	5.590s	3.971ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	2.760s	656.561us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	18.840s	4.270ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	32.340s	15.129ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
100.00	100.00	100.00	100.00	--	100.00	100.00	100.00