AON_TIMER Simulation Results

Friday May 30 2025 17:37:41 UTC

GitHub Revision: 53e8d55

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	3.670s	739.961us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	3.530s	1.271ms	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	2.960s	437.517us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	23.650s	7.398ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	3.610s	548.162us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	3.080s	514.320us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	2.960s	437.517us	20	20	100.00
		aon_timer_csr_aliasing	3.610s	548.162us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	3.010s	508.905us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	2.460s	269.797us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	1.047m	31.114ms	15	15	100.00
V2	jump	aon_timer_jump	3.420s	588.291us	5	5	100.00
V2	stress_all	aon_timer_stress_all	2.068m	52.792ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	3.250s	456.855us	50	50	100.00
V2	intr_test	aon_timer_intr_test	2.810s	389.199us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	4.070s	466.718us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	4.070s	466.718us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	3.530s	1.271ms	5	5	100.00
		aon_timer_csr_rw	2.960s	437.517us	20	20	100.00
		aon_timer_csr_aliasing	3.610s	548.162us	5	5	100.00
		aon_timer_same_csr_outstanding	7.820s	2.120ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	3.530s	1.271ms	5	5	100.00
		aon_timer_csr_rw	2.960s	437.517us	20	20	100.00
		aon_timer_csr_aliasing	3.610s	548.162us	5	5	100.00
		aon_timer_same_csr_outstanding	7.820s	2.120ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	14.290s	7.466ms	5	5	100.00
		aon_timer_tl_intg_err	14.550s	8.572ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	14.550s	8.572ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	3.130s	697.959us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	3.430s	671.514us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	10.700s	3.661ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	3.400s	584.744us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	13.080s	4.052ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	30.840s	5.023ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.25	99.09	99.05	100.00	--	98.56	99.05	99.74