AON_TIMER Simulation Results

Friday June 13 2025 17:37:55 UTC

GitHub Revision: 2211fb0

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	2.700s	498.888us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	3.840s	708.051us	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	2.930s	538.086us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	25.190s	11.669ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	3.270s	600.133us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	2.880s	490.978us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	2.930s	538.086us	20	20	100.00
		aon_timer_csr_aliasing	3.270s	600.133us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	3.090s	466.234us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	2.750s	482.466us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	50.640s	40.001ms	15	15	100.00
V2	jump	aon_timer_jump	3.820s	745.520us	5	5	100.00
V2	stress_all	aon_timer_stress_all	3.270m	162.264ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	3.030s	407.763us	50	50	100.00
V2	intr_test	aon_timer_intr_test	3.330s	485.446us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	4.360s	448.935us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	4.360s	448.935us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	3.840s	708.051us	5	5	100.00
		aon_timer_csr_rw	2.930s	538.086us	20	20	100.00
		aon_timer_csr_aliasing	3.270s	600.133us	5	5	100.00
		aon_timer_same_csr_outstanding	7.720s	2.743ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	3.840s	708.051us	5	5	100.00
		aon_timer_csr_rw	2.930s	538.086us	20	20	100.00
		aon_timer_csr_aliasing	3.270s	600.133us	5	5	100.00
		aon_timer_same_csr_outstanding	7.720s	2.743ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	16.470s	8.031ms	5	5	100.00
		aon_timer_tl_intg_err	16.330s	8.301ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	16.330s	8.301ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	3.260s	523.031us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	3.420s	702.051us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	15.500s	3.816ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	3.480s	617.575us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	22.420s	4.240ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	1.116m	38.569ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.29	99.09	99.05	100.00	--	98.56	99.05	100.00