KMAC/UNMASKED Simulation Results

Friday June 13 2025 17:37:55 UTC

GitHub Revision: 2211fb0

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke kmac_smoke 1.164m 14.698ms 50 50 100.00
V1 csr_hw_reset kmac_csr_hw_reset 2.470s 28.291us 5 5 100.00
V1 csr_rw kmac_csr_rw 2.370s 235.314us 20 20 100.00
V1 csr_bit_bash kmac_csr_bit_bash 8.730s 1.947ms 5 5 100.00
V1 csr_aliasing kmac_csr_aliasing 7.540s 333.471us 5 5 100.00
V1 csr_mem_rw_with_rand_reset kmac_csr_mem_rw_with_rand_reset 3.500s 915.022us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr kmac_csr_rw 2.370s 235.314us 20 20 100.00
kmac_csr_aliasing 7.540s 333.471us 5 5 100.00
V1 mem_walk kmac_mem_walk 2.370s 39.221us 5 5 100.00
V1 mem_partial_access kmac_mem_partial_access 2.900s 256.462us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 long_msg_and_output kmac_long_msg_and_output 47.898m 598.756ms 50 50 100.00
V2 burst_write kmac_burst_write 16.865m 151.047ms 50 50 100.00
V2 test_vectors kmac_test_vectors_sha3_224 22.117m 35.895ms 5 5 100.00
kmac_test_vectors_sha3_256 28.088m 82.923ms 5 5 100.00
kmac_test_vectors_sha3_384 20.805m 89.297ms 5 5 100.00
kmac_test_vectors_sha3_512 15.877m 260.680ms 5 5 100.00
kmac_test_vectors_shake_128 34.918m 218.873ms 5 5 100.00
kmac_test_vectors_shake_256 19.824m 17.534ms 5 5 100.00
kmac_test_vectors_kmac 3.780s 67.503us 5 5 100.00
kmac_test_vectors_kmac_xof 4.080s 76.330us 5 5 100.00
V2 sideload kmac_sideload 8.226m 42.138ms 50 50 100.00
V2 app kmac_app 5.434m 77.467ms 50 50 100.00
V2 app_with_partial_data kmac_app_with_partial_data 6.080m 122.426ms 10 10 100.00
V2 entropy_refresh kmac_entropy_refresh 5.820m 82.545ms 50 50 100.00
V2 error kmac_error 6.804m 57.608ms 50 50 100.00
V2 key_error kmac_key_error 16.320s 14.398ms 50 50 100.00
V2 sideload_invalid kmac_sideload_invalid 2.208m 10.058ms 31 50 62.00
V2 edn_timeout_error kmac_edn_timeout_error 47.090s 4.600ms 20 20 100.00
V2 entropy_mode_error kmac_entropy_mode_error 50.260s 2.357ms 20 20 100.00
V2 entropy_ready_error kmac_entropy_ready_error 1.064m 10.608ms 10 10 100.00
V2 lc_escalation kmac_lc_escalation 34.360s 2.875ms 50 50 100.00
V2 stress_all kmac_stress_all 37.540m 510.214ms 50 50 100.00
V2 intr_test kmac_intr_test 2.280s 21.880us 50 50 100.00
V2 alert_test kmac_alert_test 2.380s 35.232us 50 50 100.00
V2 tl_d_oob_addr_access kmac_tl_errors 4.450s 690.802us 20 20 100.00
V2 tl_d_illegal_access kmac_tl_errors 4.450s 690.802us 20 20 100.00
V2 tl_d_outstanding_access kmac_csr_hw_reset 2.470s 28.291us 5 5 100.00
kmac_csr_rw 2.370s 235.314us 20 20 100.00
kmac_csr_aliasing 7.540s 333.471us 5 5 100.00
kmac_same_csr_outstanding 3.510s 176.482us 20 20 100.00
V2 tl_d_partial_access kmac_csr_hw_reset 2.470s 28.291us 5 5 100.00
kmac_csr_rw 2.370s 235.314us 20 20 100.00
kmac_csr_aliasing 7.540s 333.471us 5 5 100.00
kmac_same_csr_outstanding 3.510s 176.482us 20 20 100.00
V2 TOTAL 721 740 97.43
V2S shadow_reg_update_error kmac_shadow_reg_errors 2.800s 145.764us 20 20 100.00
V2S shadow_reg_read_clear_staged_value kmac_shadow_reg_errors 2.800s 145.764us 20 20 100.00
V2S shadow_reg_storage_error kmac_shadow_reg_errors 2.800s 145.764us 20 20 100.00
V2S shadowed_reset_glitch kmac_shadow_reg_errors 2.800s 145.764us 20 20 100.00
V2S shadow_reg_update_error_with_csr_rw kmac_shadow_reg_errors_with_csr_rw 4.720s 190.647us 13 20 65.00
V2S tl_intg_err kmac_sec_cm 1.056m 5.211ms 5 5 100.00
kmac_tl_intg_err 4.860s 238.268us 13 20 65.00
V2S sec_cm_bus_integrity kmac_tl_intg_err 4.860s 238.268us 13 20 65.00
V2S sec_cm_lc_escalate_en_intersig_mubi kmac_lc_escalation 34.360s 2.875ms 50 50 100.00
V2S sec_cm_sw_key_key_masking kmac_smoke 1.164m 14.698ms 50 50 100.00
V2S sec_cm_key_sideload kmac_sideload 8.226m 42.138ms 50 50 100.00
V2S sec_cm_cfg_shadowed_config_shadow kmac_shadow_reg_errors 2.800s 145.764us 20 20 100.00
V2S sec_cm_fsm_sparse kmac_sec_cm 1.056m 5.211ms 5 5 100.00
V2S sec_cm_ctr_redun kmac_sec_cm 1.056m 5.211ms 5 5 100.00
V2S sec_cm_packer_ctr_redun kmac_sec_cm 1.056m 5.211ms 5 5 100.00
V2S sec_cm_cfg_shadowed_config_regwen kmac_smoke 1.164m 14.698ms 50 50 100.00
V2S sec_cm_fsm_global_esc kmac_lc_escalation 34.360s 2.875ms 50 50 100.00
V2S sec_cm_fsm_local_esc kmac_sec_cm 1.056m 5.211ms 5 5 100.00
V2S sec_cm_absorbed_ctrl_mubi kmac_mubi 5.423m 17.199ms 10 10 100.00
V2S sec_cm_sw_cmd_ctrl_sparse kmac_smoke 1.164m 14.698ms 50 50 100.00
V2S TOTAL 61 75 81.33
V3 stress_all_with_rand_reset kmac_stress_all_with_rand_reset 3.469m 10.529ms 4 10 40.00
V3 TOTAL 4 10 40.00
TOTAL 901 940 95.85

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
93.65 97.23 94.42 100.00 72.73 95.98 99.35 95.84

Failure Buckets