MBX Simulation Results

Friday June 13 2025 17:37:55 UTC

GitHub Revision: 2211fb0

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 mbx_smoke mbx_smoke 1.833m 15.713ms 2 2 100.00
V1 csr_hw_reset mbx_csr_hw_reset 4.000s 22.816us 5 5 100.00
V1 csr_rw mbx_csr_rw 4.000s 23.438us 20 20 100.00
V1 csr_bit_bash mbx_csr_bit_bash 5.000s 138.906us 5 5 100.00
V1 csr_aliasing mbx_csr_aliasing 4.000s 12.805us 5 5 100.00
V1 csr_mem_rw_with_rand_reset mbx_csr_mem_rw_with_rand_reset 4.000s 1.185us 0 20 0.00
V1 regwen_csr_and_corresponding_lockable_csr mbx_csr_rw 4.000s 23.438us 20 20 100.00
mbx_csr_aliasing 4.000s 12.805us 5 5 100.00
V1 TOTAL 37 57 64.91
V2 mbx_stress mbx_stress 1.367m 70.982ms 1 2 50.00
mbx_stress_zero_delays 1.583m 1.757ms 2 2 100.00
V2 mbx_imbx_oob mbx_imbx_oob 51.000s 5.807ms 2 2 100.00
V2 alert_test mbx_alert_test 5.000s 180.645us 50 50 100.00
V2 tl_d_oob_addr_access mbx_tl_errors 4.000s 7.623us 0 20 0.00
V2 tl_d_illegal_access mbx_tl_errors 4.000s 7.623us 0 20 0.00
V2 tl_d_outstanding_access mbx_csr_hw_reset 4.000s 22.816us 5 5 100.00
mbx_csr_rw 4.000s 23.438us 20 20 100.00
mbx_csr_aliasing 4.000s 12.805us 5 5 100.00
mbx_same_csr_outstanding 5.000s 21.644us 20 20 100.00
V2 tl_d_partial_access mbx_csr_hw_reset 4.000s 22.816us 5 5 100.00
mbx_csr_rw 4.000s 23.438us 20 20 100.00
mbx_csr_aliasing 4.000s 12.805us 5 5 100.00
mbx_same_csr_outstanding 5.000s 21.644us 20 20 100.00
V2 TOTAL 75 96 78.12
V2S tl_intg_err mbx_sec_cm 5.000s 147.871us 5 5 100.00
mbx_tl_intg_err 5.000s 50.708us 0 20 0.00
V2S TOTAL 5 25 20.00
TOTAL 117 178 65.73

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
89.37 96.82 92.25 96.64 80.03 78.94 -- 98.54 65.23

Failure Buckets