MBX Simulation Results

Friday June 20 2025 17:30:43 UTC

GitHub Revision: 4a542c3

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 mbx_smoke mbx_smoke 1.050m 1.618ms 2 2 100.00
V1 csr_hw_reset mbx_csr_hw_reset 5.000s 23.262us 5 5 100.00
V1 csr_rw mbx_csr_rw 5.000s 40.192us 20 20 100.00
V1 csr_bit_bash mbx_csr_bit_bash 5.000s 35.019us 5 5 100.00
V1 csr_aliasing mbx_csr_aliasing 5.000s 35.210us 5 5 100.00
V1 csr_mem_rw_with_rand_reset mbx_csr_mem_rw_with_rand_reset 5.000s 5.106us 0 20 0.00
V1 regwen_csr_and_corresponding_lockable_csr mbx_csr_rw 5.000s 40.192us 20 20 100.00
mbx_csr_aliasing 5.000s 35.210us 5 5 100.00
V1 TOTAL 37 57 64.91
V2 mbx_stress mbx_stress 47.000s 1.549ms 1 2 50.00
mbx_stress_zero_delays 1.100m 756.881us 2 2 100.00
V2 mbx_imbx_oob mbx_imbx_oob 45.000s 796.961us 2 2 100.00
V2 alert_test mbx_alert_test 38.000s 16.567us 50 50 100.00
V2 tl_d_oob_addr_access mbx_tl_errors 5.000s 1.920us 0 20 0.00
V2 tl_d_illegal_access mbx_tl_errors 5.000s 1.920us 0 20 0.00
V2 tl_d_outstanding_access mbx_csr_hw_reset 5.000s 23.262us 5 5 100.00
mbx_csr_rw 5.000s 40.192us 20 20 100.00
mbx_csr_aliasing 5.000s 35.210us 5 5 100.00
mbx_same_csr_outstanding 5.000s 37.024us 20 20 100.00
V2 tl_d_partial_access mbx_csr_hw_reset 5.000s 23.262us 5 5 100.00
mbx_csr_rw 5.000s 40.192us 20 20 100.00
mbx_csr_aliasing 5.000s 35.210us 5 5 100.00
mbx_same_csr_outstanding 5.000s 37.024us 20 20 100.00
V2 TOTAL 75 96 78.12
V2S tl_intg_err mbx_sec_cm 38.000s 40.419us 5 5 100.00
mbx_tl_intg_err 5.000s 6.609us 0 20 0.00
V2S TOTAL 5 25 20.00
TOTAL 117 178 65.73

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
89.52 97.02 92.79 96.86 80.03 78.94 -- 98.54 65.23

Failure Buckets