751b8fb| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | random | rv_timer_random | 0.990s | 1.786us | 0 | 20 | 0.00 |
| V1 | csr_hw_reset | rv_timer_csr_hw_reset | 0.610s | 4.405us | 0 | 5 | 0.00 |
| V1 | csr_rw | rv_timer_csr_rw | 0.620s | 3.284us | 0 | 20 | 0.00 |
| V1 | csr_bit_bash | rv_timer_csr_bit_bash | 0.600s | 847.352ns | 0 | 5 | 0.00 |
| V1 | csr_aliasing | rv_timer_csr_aliasing | 0.630s | 740.768ns | 0 | 5 | 0.00 |
| V1 | csr_mem_rw_with_rand_reset | rv_timer_csr_mem_rw_with_rand_reset | 0.630s | 1.169us | 0 | 20 | 0.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | rv_timer_csr_rw | 0.620s | 3.284us | 0 | 20 | 0.00 |
| rv_timer_csr_aliasing | 0.630s | 740.768ns | 0 | 5 | 0.00 | ||
| V1 | TOTAL | 0 | 75 | 0.00 | |||
| V2 | random_reset | rv_timer_random_reset | 1.010s | 4.381us | 0 | 20 | 0.00 |
| V2 | disabled | rv_timer_disabled | 1.000s | 1.638us | 0 | 20 | 0.00 |
| V2 | cfg_update_on_fly | rv_timer_cfg_update_on_fly | 1.050s | 2.827us | 0 | 10 | 0.00 |
| V2 | no_interrupt_test | rv_timer_cfg_update_on_fly | 1.050s | 2.827us | 0 | 10 | 0.00 |
| V2 | stress | rv_timer_stress_all | 1.020s | 806.100ns | 0 | 20 | 0.00 |
| V2 | alert_test | rv_timer_alert_test | 1.010s | 2.612us | 0 | 50 | 0.00 |
| V2 | intr_test | rv_timer_intr_test | 0.680s | 3.463us | 0 | 50 | 0.00 |
| V2 | tl_d_oob_addr_access | rv_timer_tl_errors | 0.610s | 1.597us | 0 | 20 | 0.00 |
| V2 | tl_d_illegal_access | rv_timer_tl_errors | 0.610s | 1.597us | 0 | 20 | 0.00 |
| V2 | tl_d_outstanding_access | rv_timer_csr_hw_reset | 0.610s | 4.405us | 0 | 5 | 0.00 |
| rv_timer_csr_rw | 0.620s | 3.284us | 0 | 20 | 0.00 | ||
| rv_timer_csr_aliasing | 0.630s | 740.768ns | 0 | 5 | 0.00 | ||
| rv_timer_same_csr_outstanding | 0.610s | 2.273us | 0 | 20 | 0.00 | ||
| V2 | tl_d_partial_access | rv_timer_csr_hw_reset | 0.610s | 4.405us | 0 | 5 | 0.00 |
| rv_timer_csr_rw | 0.620s | 3.284us | 0 | 20 | 0.00 | ||
| rv_timer_csr_aliasing | 0.630s | 740.768ns | 0 | 5 | 0.00 | ||
| rv_timer_same_csr_outstanding | 0.610s | 2.273us | 0 | 20 | 0.00 | ||
| V2 | TOTAL | 0 | 210 | 0.00 | |||
| V2S | tl_intg_err | rv_timer_sec_cm | 0.950s | 4.907us | 0 | 5 | 0.00 |
| rv_timer_tl_intg_err | 0.610s | 4.707us | 0 | 20 | 0.00 | ||
| V2S | sec_cm_bus_integrity | rv_timer_tl_intg_err | 0.610s | 4.707us | 0 | 20 | 0.00 |
| V2S | TOTAL | 0 | 25 | 0.00 | |||
| V3 | min_value | rv_timer_min | 1.000s | 5.536us | 0 | 10 | 0.00 |
| V3 | max_value | rv_timer_max | 1.020s | 739.392ns | 0 | 10 | 0.00 |
| V3 | stress_all_with_rand_reset | rv_timer_stress_all_with_rand_reset | 1.010s | 9.435us | 0 | 20 | 0.00 |
| V3 | TOTAL | 0 | 40 | 0.00 | |||
| TOTAL | 0 | 350 | 0.00 |
UVM_FATAL (cip_base_vseq.sv:123) virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class! has 350 failures:
0.rv_timer_random.34786090996684864471084154136472931003718067365299416758156948912304457096184
Line 71, in log /nightly/current_run/scratch/master/rv_timer-sim-vcs/0.rv_timer_random/latest/run.log
UVM_FATAL @ 4093135 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class!
UVM_INFO @ 4093135 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.rv_timer_random.4655930578168138896119349955920200022944047794157021671005147061946010028223
Line 71, in log /nightly/current_run/scratch/master/rv_timer-sim-vcs/1.rv_timer_random/latest/run.log
UVM_FATAL @ 786071 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class!
UVM_INFO @ 786071 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 18 more failures.
0.rv_timer_min.25591815210541075593950903707060344848834529073007462704363620759385731924160
Line 71, in log /nightly/current_run/scratch/master/rv_timer-sim-vcs/0.rv_timer_min/latest/run.log
UVM_FATAL @ 970173 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class!
UVM_INFO @ 970173 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.rv_timer_min.21145140229301624248500369022299441846663074355054482861277410073868134387290
Line 71, in log /nightly/current_run/scratch/master/rv_timer-sim-vcs/1.rv_timer_min/latest/run.log
UVM_FATAL @ 4346804 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class!
UVM_INFO @ 4346804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 8 more failures.
0.rv_timer_max.93932852601580396200857675148671539161515634963103599498988393227566833307941
Line 71, in log /nightly/current_run/scratch/master/rv_timer-sim-vcs/0.rv_timer_max/latest/run.log
UVM_FATAL @ 763965 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class!
UVM_INFO @ 763965 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.rv_timer_max.63875932297779430091417029688936830485658877917729074747653572641120138582779
Line 71, in log /nightly/current_run/scratch/master/rv_timer-sim-vcs/1.rv_timer_max/latest/run.log
UVM_FATAL @ 898930 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class!
UVM_INFO @ 898930 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 8 more failures.
0.rv_timer_disabled.76104565890004947185594725105191819722877569642881274162885801988040401664884
Line 71, in log /nightly/current_run/scratch/master/rv_timer-sim-vcs/0.rv_timer_disabled/latest/run.log
UVM_FATAL @ 6197559 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class!
UVM_INFO @ 6197559 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.rv_timer_disabled.26475220832595642051257899551060216501838965805992457871121923100106636550941
Line 71, in log /nightly/current_run/scratch/master/rv_timer-sim-vcs/1.rv_timer_disabled/latest/run.log
UVM_FATAL @ 898471 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class!
UVM_INFO @ 898471 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 18 more failures.
0.rv_timer_cfg_update_on_fly.25029207428029229157599207515024534125283978987895505667272213385708841871181
Line 71, in log /nightly/current_run/scratch/master/rv_timer-sim-vcs/0.rv_timer_cfg_update_on_fly/latest/run.log
UVM_FATAL @ 1532432 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class!
UVM_INFO @ 1532432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
1.rv_timer_cfg_update_on_fly.45710237585372940208120246240358802447711823264788185380740882476597370429644
Line 71, in log /nightly/current_run/scratch/master/rv_timer-sim-vcs/1.rv_timer_cfg_update_on_fly/latest/run.log
UVM_FATAL @ 3742569 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [rv_timer_base_vseq] Need to override this when you extend from this class!
UVM_INFO @ 3742569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 8 more failures.
Job killed most likely because its dependent job failed. has 2 failures:
cov_merge
Log /nightly/current_run/scratch/master/rv_timer-sim-vcs/cov_merge/merged.vdb/cov_merge.log
cov_report
Log /nightly/current_run/scratch/master/rv_timer-sim-vcs/cov_report/cov_report.log