SPI_HOST Simulation Results

Friday August 29 2025 17:04:28 UTC

GitHub Revision: 751b8fb

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_host_smoke	4.000s	2.701us	0	50	0.00
V1	csr_hw_reset	spi_host_csr_hw_reset	3.000s	1.124us	0	5	0.00
V1	csr_rw	spi_host_csr_rw	3.000s	4.277us	0	20	0.00
V1	csr_bit_bash	spi_host_csr_bit_bash	3.000s	1.504us	0	5	0.00
V1	csr_aliasing	spi_host_csr_aliasing	3.000s	1.412us	0	5	0.00
V1	csr_mem_rw_with_rand_reset	spi_host_csr_mem_rw_with_rand_reset	4.000s	5.152us	0	20	0.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_host_csr_rw	3.000s	4.277us	0	20	0.00
		spi_host_csr_aliasing	3.000s	1.412us	0	5	0.00
V1	mem_walk	spi_host_mem_walk	3.000s	1.859us	0	5	0.00
V1	mem_partial_access	spi_host_mem_partial_access	3.000s	5.224us	0	5	0.00
V1		TOTAL			0	115	0.00
V2	performance	spi_host_performance	3.000s	949.846ns	0	50	0.00
V2	error_event_intr	spi_host_overflow_underflow	3.000s	1.851us	0	50	0.00
		spi_host_error_cmd	3.000s	4.360us	0	50	0.00
		spi_host_event	3.000s	738.545ns	0	50	0.00
V2	clock_rate	spi_host_speed	8.000s	1.310us	0	50	0.00
V2	speed	spi_host_speed	8.000s	1.310us	0	50	0.00
V2	chip_select_timing	spi_host_speed	8.000s	1.310us	0	50	0.00
V2	sw_reset	spi_host_sw_reset	3.000s	3.813us	0	50	0.00
V2	passthrough_mode	spi_host_passthrough_mode	8.000s	3.948us	0	50	0.00
V2	cpol_cpha	spi_host_speed	8.000s	1.310us	0	50	0.00
V2	full_cycle	spi_host_speed	8.000s	1.310us	0	50	0.00
V2	duplex	spi_host_smoke	4.000s	2.701us	0	50	0.00
V2	tx_rx_only	spi_host_smoke	4.000s	2.701us	0	50	0.00
V2	stress_all	spi_host_stress_all	3.000s	2.114us	0	50	0.00
V2	spien	spi_host_spien	4.000s	1.963us	0	50	0.00
V2	stall	spi_host_status_stall	3.000s	4.275us	0	50	0.00
V2	Idlecsbactive	spi_host_idlecsbactive	4.000s	6.988us	0	50	0.00
V2	data_fifo_status	spi_host_overflow_underflow	3.000s	1.851us	0	50	0.00
V2	alert_test	spi_host_alert_test	3.000s	1.562us	0	50	0.00
V2	intr_test	spi_host_intr_test	4.000s	1.087us	0	50	0.00
V2	tl_d_oob_addr_access	spi_host_tl_errors	4.000s	854.803ns	0	20	0.00
V2	tl_d_illegal_access	spi_host_tl_errors	4.000s	854.803ns	0	20	0.00
V2	tl_d_outstanding_access	spi_host_csr_hw_reset	3.000s	1.124us	0	5	0.00
		spi_host_csr_rw	3.000s	4.277us	0	20	0.00
		spi_host_csr_aliasing	3.000s	1.412us	0	5	0.00
		spi_host_same_csr_outstanding	4.000s	2.223us	0	20	0.00
V2	tl_d_partial_access	spi_host_csr_hw_reset	3.000s	1.124us	0	5	0.00
		spi_host_csr_rw	3.000s	4.277us	0	20	0.00
		spi_host_csr_aliasing	3.000s	1.412us	0	5	0.00
		spi_host_same_csr_outstanding	4.000s	2.223us	0	20	0.00
V2		TOTAL			0	690	0.00
V2S	tl_intg_err	spi_host_tl_intg_err	4.000s	5.852us	0	20	0.00
		spi_host_sec_cm	3.000s	1.388us	0	5	0.00
V2S	sec_cm_bus_integrity	spi_host_tl_intg_err	4.000s	5.852us	0	20	0.00
V2S		TOTAL			0	25	0.00
	Unmapped tests	spi_host_upper_range_clkdiv	4.000s	767.328ns	0	10	0.00
		TOTAL			0	840	0.00

Failure Buckets

• UVM_FATAL (cip_base_vseq.sv:123) virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class! has 840 failures:
  • Test spi_host_smoke has 50 failures.

    • 0.spi_host_smoke.49673383440908463005788838229319502550496202712481761040493276885370410269911
      Line 80, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/0.spi_host_smoke/latest/run.log

        UVM_FATAL @  15894168 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @  15894168 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 1.spi_host_smoke.19070848869011626160511510079667024127583728641615334394943569327339873029575
      Line 80, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/1.spi_host_smoke/latest/run.log

        UVM_FATAL @   4318727 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   4318727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 48 more failures.

  • Test spi_host_speed has 50 failures.

    • 0.spi_host_speed.87643020652064057571326017235815133546961565185437991003331482905497858991808
      Line 80, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/0.spi_host_speed/latest/run.log

        UVM_FATAL @   1067291 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   1067291 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 1.spi_host_speed.34680166551938404373654585138157750997754034848719026794791994096236578925078
      Line 80, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/1.spi_host_speed/latest/run.log

        UVM_FATAL @   5051859 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   5051859 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 48 more failures.

  • Test spi_host_upper_range_clkdiv has 10 failures.

    • 0.spi_host_upper_range_clkdiv.82424815723989970019048432135581330855963591019534448842860234389061417877434
      Line 80, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/0.spi_host_upper_range_clkdiv/latest/run.log

        UVM_FATAL @    767328 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @    767328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 1.spi_host_upper_range_clkdiv.82434570793518900293698622860320769412002091912303204441114311826896801608081
      Line 80, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/1.spi_host_upper_range_clkdiv/latest/run.log

        UVM_FATAL @   4141619 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   4141619 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 8 more failures.

  • Test spi_host_performance has 50 failures.

    • 0.spi_host_performance.64965851324213183445039685980531924679011196050939272052650435272819035912331
      Line 80, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/0.spi_host_performance/latest/run.log

        UVM_FATAL @    949846 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @    949846 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 1.spi_host_performance.71286536277299072416934961012848475241018801650674166678957556787042730901351
      Line 80, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/1.spi_host_performance/latest/run.log

        UVM_FATAL @   4141774 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   4141774 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 48 more failures.

  • Test spi_host_sw_reset has 50 failures.

    • 0.spi_host_sw_reset.55165579477672634127247590636233910691902087225926367650910818312247201480145
      Line 80, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/0.spi_host_sw_reset/latest/run.log

        UVM_FATAL @   3812831 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   3812831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 1.spi_host_sw_reset.115152570917913088383273182362733666925665945792317530269485780050921356745423
      Line 80, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/1.spi_host_sw_reset/latest/run.log

        UVM_FATAL @    851345 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_host_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @    851345 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 48 more failures.

  • ... and 21 more tests.
• Job killed most likely because its dependent job failed. has 2 failures:
  • Test spi_host has 2 failures.

    • cov_merge
      Log /nightly/current_run/scratch/master/spi_host-sim-xcelium/cov_merge/merged/cov_merge.log

    • cov_report
      Log /nightly/current_run/scratch/master/spi_host-sim-xcelium/cov_report/cov_report.log