AES/UNMASKED Simulation Results

Friday September 05 2025 17:04:13 UTC

GitHub Revision: `6181a2d`

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	wake_up	aes_wake_up	2.000s	114.275us	1	1	100.00
V1	smoke	aes_smoke	4.000s	98.601us	50	50	100.00
V1	csr_hw_reset	aes_csr_hw_reset	7.000s	64.855us	5	5	100.00
V1	csr_rw	aes_csr_rw	7.000s	81.514us	20	20	100.00
V1	csr_bit_bash	aes_csr_bit_bash	11.000s	640.416us	5	5	100.00
V1	csr_aliasing	aes_csr_aliasing	8.000s	102.373us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aes_csr_mem_rw_with_rand_reset	7.000s	347.543us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aes_csr_rw	7.000s	81.514us	20	20	100.00
		aes_csr_aliasing	8.000s	102.373us	5	5	100.00
V1		TOTAL			106	106	100.00
V2	algorithm	aes_smoke	4.000s	98.601us	50	50	100.00
		aes_config_error	6.000s	224.801us	50	50	100.00
		aes_stress	4.000s	187.541us	50	50	100.00
V2	key_length	aes_smoke	4.000s	98.601us	50	50	100.00
		aes_config_error	6.000s	224.801us	50	50	100.00
		aes_stress	4.000s	187.541us	50	50	100.00
V2	back2back	aes_stress	4.000s	187.541us	50	50	100.00
		aes_b2b	8.000s	586.919us	50	50	100.00
V2	backpressure	aes_stress	4.000s	187.541us	50	50	100.00
V2	multi_message	aes_smoke	4.000s	98.601us	50	50	100.00
		aes_config_error	6.000s	224.801us	50	50	100.00
		aes_stress	4.000s	187.541us	50	50	100.00
		aes_alert_reset	4.000s	95.309us	50	50	100.00
V2	failure_test	aes_man_cfg_err	4.000s	134.361us	50	50	100.00
		aes_config_error	6.000s	224.801us	50	50	100.00
		aes_alert_reset	4.000s	95.309us	50	50	100.00
V2	trigger_clear_test	aes_clear	5.000s	222.915us	50	50	100.00
V2	nist_test_vectors	aes_nist_vectors	6.000s	846.727us	1	1	100.00
V2	reset_recovery	aes_alert_reset	4.000s	95.309us	50	50	100.00
V2	stress	aes_stress	4.000s	187.541us	50	50	100.00
V2	sideload	aes_stress	4.000s	187.541us	50	50	100.00
		aes_sideload	5.000s	180.606us	50	50	100.00
V2	deinitialization	aes_deinit	4.000s	134.851us	50	50	100.00
V2	stress_all	aes_stress_all	20.000s	606.861us	10	10	100.00
V2	alert_test	aes_alert_test	3.000s	56.256us	50	50	100.00
V2	tl_d_oob_addr_access	aes_tl_errors	8.000s	68.415us	20	20	100.00
V2	tl_d_illegal_access	aes_tl_errors	8.000s	68.415us	20	20	100.00
V2	tl_d_outstanding_access	aes_csr_hw_reset	7.000s	64.855us	5	5	100.00
		aes_csr_rw	7.000s	81.514us	20	20	100.00
		aes_csr_aliasing	8.000s	102.373us	5	5	100.00
		aes_same_csr_outstanding	7.000s	88.825us	20	20	100.00
V2	tl_d_partial_access	aes_csr_hw_reset	7.000s	64.855us	5	5	100.00
		aes_csr_rw	7.000s	81.514us	20	20	100.00
		aes_csr_aliasing	8.000s	102.373us	5	5	100.00
		aes_same_csr_outstanding	7.000s	88.825us	20	20	100.00
V2		TOTAL			501	501	100.00
V2S	reseeding	aes_reseed	5.000s	1.062ms	50	50	100.00
V2S	fault_inject	aes_fi	4.000s	84.893us	49	50	98.00
		aes_control_fi	31.000s	10.003ms	276	300	92.00
		aes_cipher_fi	34.000s	10.016ms	322	350	92.00
V2S	shadow_reg_update_error	aes_shadow_reg_errors	7.000s	110.200us	20	20	100.00
V2S	shadow_reg_read_clear_staged_value	aes_shadow_reg_errors	7.000s	110.200us	20	20	100.00
V2S	shadow_reg_storage_error	aes_shadow_reg_errors	7.000s	110.200us	20	20	100.00
V2S	shadowed_reset_glitch	aes_shadow_reg_errors	7.000s	110.200us	20	20	100.00
V2S	shadow_reg_update_error_with_csr_rw	aes_shadow_reg_errors_with_csr_rw	8.000s	175.658us	20	20	100.00
V2S	tl_intg_err	aes_sec_cm	5.000s	1.449ms	5	5	100.00
		aes_tl_intg_err	9.000s	549.312us	20	20	100.00
V2S	sec_cm_bus_integrity	aes_tl_intg_err	9.000s	549.312us	20	20	100.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	aes_alert_reset	4.000s	95.309us	50	50	100.00
V2S	sec_cm_main_config_shadow	aes_shadow_reg_errors	7.000s	110.200us	20	20	100.00
V2S	sec_cm_main_config_sparse	aes_smoke	4.000s	98.601us	50	50	100.00
		aes_stress	4.000s	187.541us	50	50	100.00
		aes_alert_reset	4.000s	95.309us	50	50	100.00
		aes_core_fi	2.467m	10.024ms	68	70	97.14
V2S	sec_cm_aux_config_shadow	aes_shadow_reg_errors	7.000s	110.200us	20	20	100.00
V2S	sec_cm_aux_config_regwen	aes_readability	4.000s	210.327us	50	50	100.00
		aes_stress	4.000s	187.541us	50	50	100.00
V2S	sec_cm_key_sideload	aes_stress	4.000s	187.541us	50	50	100.00
		aes_sideload	5.000s	180.606us	50	50	100.00
V2S	sec_cm_key_sw_unreadable	aes_readability	4.000s	210.327us	50	50	100.00
V2S	sec_cm_data_reg_sw_unreadable	aes_readability	4.000s	210.327us	50	50	100.00
V2S	sec_cm_key_sec_wipe	aes_readability	4.000s	210.327us	50	50	100.00
V2S	sec_cm_iv_config_sec_wipe	aes_readability	4.000s	210.327us	50	50	100.00
V2S	sec_cm_data_reg_sec_wipe	aes_readability	4.000s	210.327us	50	50	100.00
V2S	sec_cm_data_reg_key_sca	aes_stress	4.000s	187.541us	50	50	100.00
V2S	sec_cm_key_masking	aes_stress	4.000s	187.541us	50	50	100.00
V2S	sec_cm_main_fsm_sparse	aes_fi	4.000s	84.893us	49	50	98.00
V2S	sec_cm_main_fsm_redun	aes_fi	4.000s	84.893us	49	50	98.00
		aes_control_fi	31.000s	10.003ms	276	300	92.00
		aes_cipher_fi	34.000s	10.016ms	322	350	92.00
		aes_ctr_fi	8.000s	54.356us	50	50	100.00
V2S	sec_cm_cipher_fsm_sparse	aes_fi	4.000s	84.893us	49	50	98.00
V2S	sec_cm_cipher_fsm_redun	aes_fi	4.000s	84.893us	49	50	98.00
		aes_control_fi	31.000s	10.003ms	276	300	92.00
		aes_cipher_fi	34.000s	10.016ms	322	350	92.00
V2S	sec_cm_cipher_ctr_redun	aes_cipher_fi	34.000s	10.016ms	322	350	92.00
V2S	sec_cm_ctr_fsm_sparse	aes_fi	4.000s	84.893us	49	50	98.00
V2S	sec_cm_ctr_fsm_redun	aes_fi	4.000s	84.893us	49	50	98.00
		aes_control_fi	31.000s	10.003ms	276	300	92.00
		aes_ctr_fi	8.000s	54.356us	50	50	100.00
V2S	sec_cm_ctrl_sparse	aes_fi	4.000s	84.893us	49	50	98.00
		aes_control_fi	31.000s	10.003ms	276	300	92.00
		aes_cipher_fi	34.000s	10.016ms	322	350	92.00
		aes_ctr_fi	8.000s	54.356us	50	50	100.00
V2S	sec_cm_main_fsm_global_esc	aes_alert_reset	4.000s	95.309us	50	50	100.00
V2S	sec_cm_main_fsm_local_esc	aes_fi	4.000s	84.893us	49	50	98.00
		aes_control_fi	31.000s	10.003ms	276	300	92.00
		aes_cipher_fi	34.000s	10.016ms	322	350	92.00
		aes_ctr_fi	8.000s	54.356us	50	50	100.00
V2S	sec_cm_cipher_fsm_local_esc	aes_fi	4.000s	84.893us	49	50	98.00
		aes_control_fi	31.000s	10.003ms	276	300	92.00
		aes_cipher_fi	34.000s	10.016ms	322	350	92.00
		aes_ctr_fi	8.000s	54.356us	50	50	100.00
V2S	sec_cm_ctr_fsm_local_esc	aes_fi	4.000s	84.893us	49	50	98.00
		aes_control_fi	31.000s	10.003ms	276	300	92.00
		aes_ctr_fi	8.000s	54.356us	50	50	100.00
V2S	sec_cm_data_reg_local_esc	aes_fi	4.000s	84.893us	49	50	98.00
		aes_control_fi	31.000s	10.003ms	276	300	92.00
		aes_cipher_fi	34.000s	10.016ms	322	350	92.00
V2S		TOTAL			930	985	94.42
V3	stress_all_with_rand_reset	aes_stress_all_with_rand_reset	18.000s	4.034ms	0	10	0.00
V3		TOTAL			0	10	0.00
		TOTAL			1537	1602	95.94

Failure Buckets

Job timed out after * minutes has 25 failures:
- Test aes_cipher_fi has 13 failures.
  - 21.aes_cipher_fi.97279908313263058134633528376194043677870705062388455823100341907572055735048
    Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/21.aes_cipher_fi/latest/run.log
```
  Job timed out after 1 minutes
```
  - 29.aes_cipher_fi.88636177815854823549506841226618894371388616337934875517573551853326776202809
    Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/29.aes_cipher_fi/latest/run.log
```
  Job timed out after 1 minutes
```
  - ... and 11 more failures.
- Test aes_control_fi has 12 failures.
  - 35.aes_control_fi.45270945897057371630420442124728862707194031723433195244950124361168294315350
    Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/35.aes_control_fi/latest/run.log
```
  Job timed out after 1 minutes
```
  - 38.aes_control_fi.44753597342184947316826799864829348407423639263225016421783063325050205611534
    Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/38.aes_control_fi/latest/run.log
```
  Job timed out after 1 minutes
```
  - ... and 10 more failures.
UVM_FATAL (aes_cipher_fi_vseq.sv:62) [aes_cipher_fi_vseq] wait timeout occurred! has 15 failures:
- Test aes_cipher_fi has 15 failures.
  - 0.aes_cipher_fi.61505610289858301536664774980793855526782775329983807747270587749856082730279
    Line 130, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/0.aes_cipher_fi/latest/run.log
```
  UVM_FATAL @ 10086161639 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10086161639 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 5.aes_cipher_fi.40382255080086921163359650536303107082304995141250455408075233684046236779016
    Line 134, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/5.aes_cipher_fi/latest/run.log
```
  UVM_FATAL @ 10004849837 ps: (aes_cipher_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_cipher_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10004849837 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 13 more failures.
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! has 12 failures:
- Test aes_control_fi has 12 failures.
  - 3.aes_control_fi.96670036838512890516065901827657823063399034635768538446013413073628715963179
    Line 147, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/3.aes_control_fi/latest/run.log
```
  UVM_FATAL @ 10009249779 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10009249779 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 5.aes_control_fi.105224618354456077175659227271113322758256397328842554549586896706171308477578
    Line 141, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/5.aes_control_fi/latest/run.log
```
  UVM_FATAL @ 10014003457 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
  UVM_INFO @ 10014003457 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 10 more failures.

UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues has 8 failures:

Test aes_stress_all_with_rand_reset has 8 failures.

0.aes_stress_all_with_rand_reset.66565274295176117950094876589188965721348389688242416092482612651918397456280
Line 850, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/0.aes_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1966613911 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
  UVM_INFO @ 1966613911 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.aes_stress_all_with_rand_reset.26688999781191338402600495408420641240870251966230079816640710065727686754071
Line 682, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/1.aes_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1913618782 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_reseed_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
  UVM_INFO @ 1913618782 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 6 more failures.

UVM_FATAL (aes_base_vseq.sv:74) [aes_alert_reset_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) has 1 failures:
- Test aes_stress_all_with_rand_reset has 1 failures.
  - 6.aes_stress_all_with_rand_reset.35599497991332120292380715620328601331691875556485272958189613842072415646883
    Line 269, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/6.aes_stress_all_with_rand_reset/latest/run.log
```
  UVM_FATAL @ 1049784162 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_alert_reset_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
  UVM_INFO @ 1049784162 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (aes_base_vseq.sv:74) [aes_reseed_vseq] Check failed (aes_ctrl_aux[*] == cfg.do_reseed) has 1 failures:
- Test aes_stress_all_with_rand_reset has 1 failures.
  - 9.aes_stress_all_with_rand_reset.112595246091296699020275131748884728206060610692548656392793017123630371023527
    Line 149, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/9.aes_stress_all_with_rand_reset/latest/run.log
```
  UVM_FATAL @  14676717 ps: (aes_base_vseq.sv:74) [uvm_test_top.env.virtual_sequencer.aes_reseed_vseq] Check failed (aes_ctrl_aux[0] == cfg.do_reseed)
  UVM_INFO @  14676717 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (aes_fi_vseq.sv:69) virtual_sequencer [aes_fi_vseq] Was Able to finish without clearing reset has 1 failures:
- Test aes_fi has 1 failures.
  - 18.aes_fi.41263132716316124503751516950111329882256065458116384659340126428686022198559
    Line 5269, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/18.aes_fi/latest/run.log
```
  UVM_FATAL @ 367175456 ps: (aes_fi_vseq.sv:69) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.aes_fi_vseq] Was Able to finish without clearing reset
  UVM_INFO @ 367175456 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) has 1 failures:
- Test aes_core_fi has 1 failures.
  - 46.aes_core_fi.42125526835782178477404638424450538753255714109102179069468971713756078269982
    Line 146, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/46.aes_core_fi/latest/run.log
```
  UVM_FATAL @ 10205428088 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x561e3484, Comparison=CompareOpEq, exp_data=0x0, call_count=8)
  UVM_INFO @ 10205428088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7) has 1 failures:
- Test aes_core_fi has 1 failures.
  - 67.aes_core_fi.16451575710233248780726394523318501051782504218488869097636086384186845726829
    Line 132, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/67.aes_core_fi/latest/run.log
```
  UVM_FATAL @ 10023923919 ps: (csr_utils_pkg.sv:618) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout aes_reg_block.status.idle (addr=0x5f383f84, Comparison=CompareOpEq, exp_data=0x0, call_count=7)
  UVM_INFO @ 10023923919 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```

Job returned non-zero exit code has 1 failures:

Test aes has 1 failures.

cov_merge
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/cov_merge/merged/cov_merge.log

  [Executing]:
  make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk cov_merge cov_merge_cmd=imc cov_merge_opts='-64bit -licqueue -exec /nightly/current_run/opentitan/hw/dv/tools/xcelium/cov_merge.tcl'

  [make]: cov_merge
  imc -64bit -licqueue -exec /nightly/current_run/opentitan/hw/dv/tools/xcelium/cov_merge.tcl
  *I,imc.tool.cov.version.diff: "There is a difference between the IMC tool version 22.09 and the coverage version 21.09-s006"
  Error: Cannot invoke "jdk.internal.platform.CgroupInfo.getMountPoint()" because "<parameter1>" is null
  Created log file /nightly/current_run/opentitan/startup.log
  make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:231: cov_merge] Error 1

Job killed most likely because its dependent job failed. has 1 failures:
- Test aes has 1 failures.
  - cov_report
    Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/cov_report/cov_report.log