AON_TIMER Simulation Results

Friday September 05 2025 17:04:13 UTC

GitHub Revision: 6181a2d

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	1.850s	485.174us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	2.930s	1.040ms	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	1.960s	502.570us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	10.930s	7.318ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	2.120s	368.291us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	2.150s	531.809us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	1.960s	502.570us	20	20	100.00
		aon_timer_csr_aliasing	2.120s	368.291us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	1.410s	285.371us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	1.070s	504.206us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	1.269m	61.941ms	15	15	100.00
V2	jump	aon_timer_jump	2.470s	654.386us	5	5	100.00
V2	stress_all	aon_timer_stress_all	1.687m	89.951ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	2.020s	466.667us	50	50	100.00
V2	intr_test	aon_timer_intr_test	2.020s	446.598us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	3.420s	548.704us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	3.420s	548.704us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	2.930s	1.040ms	5	5	100.00
		aon_timer_csr_rw	1.960s	502.570us	20	20	100.00
		aon_timer_csr_aliasing	2.120s	368.291us	5	5	100.00
		aon_timer_same_csr_outstanding	8.360s	3.206ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	2.930s	1.040ms	5	5	100.00
		aon_timer_csr_rw	1.960s	502.570us	20	20	100.00
		aon_timer_csr_aliasing	2.120s	368.291us	5	5	100.00
		aon_timer_same_csr_outstanding	8.360s	3.206ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	17.750s	8.240ms	5	5	100.00
		aon_timer_tl_intg_err	11.410s	8.705ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	11.410s	8.705ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	1.720s	670.387us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	1.870s	515.403us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	11.240s	3.608ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	1.540s	535.250us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	18.720s	4.032ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	37.270s	9.306ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.29	99.09	99.05	100.00	--	98.56	99.05	100.00