CSRNG Simulation Results

Friday September 05 2025 17:04:13 UTC

GitHub Revision: 6181a2d

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	csrng_smoke	35.000s	29.821us	50	50	100.00
V1	csr_hw_reset	csrng_csr_hw_reset	4.000s	62.291us	5	5	100.00
V1	csr_rw	csrng_csr_rw	4.000s	30.519us	20	20	100.00
V1	csr_bit_bash	csrng_csr_bit_bash	28.000s	1.453ms	5	5	100.00
V1	csr_aliasing	csrng_csr_aliasing	7.000s	91.550us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	csrng_csr_mem_rw_with_rand_reset	6.000s	223.468us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	csrng_csr_rw	4.000s	30.519us	20	20	100.00
		csrng_csr_aliasing	7.000s	91.550us	5	5	100.00
V1		TOTAL			105	105	100.00
V2	interrupts	csrng_intr	42.000s	308.089us	183	200	91.50
V2	alerts	csrng_alert	1.633m	6.670ms	500	500	100.00
V2	err	csrng_err	31.000s	21.836us	475	500	95.00
V2	cmds	csrng_cmds	6.933m	31.119ms	50	50	100.00
V2	life cycle	csrng_cmds	6.933m	31.119ms	50	50	100.00
V2	stress_all	csrng_stress_all	20.683m	53.453ms	49	50	98.00
V2	intr_test	csrng_intr_test	4.000s	173.780us	50	50	100.00
V2	alert_test	csrng_alert_test	35.000s	17.941us	50	50	100.00
V2	tl_d_oob_addr_access	csrng_tl_errors	13.000s	751.658us	20	20	100.00
V2	tl_d_illegal_access	csrng_tl_errors	13.000s	751.658us	20	20	100.00
V2	tl_d_outstanding_access	csrng_csr_hw_reset	4.000s	62.291us	5	5	100.00
		csrng_csr_rw	4.000s	30.519us	20	20	100.00
		csrng_csr_aliasing	7.000s	91.550us	5	5	100.00
		csrng_same_csr_outstanding	5.000s	146.762us	20	20	100.00
V2	tl_d_partial_access	csrng_csr_hw_reset	4.000s	62.291us	5	5	100.00
		csrng_csr_rw	4.000s	30.519us	20	20	100.00
		csrng_csr_aliasing	7.000s	91.550us	5	5	100.00
		csrng_same_csr_outstanding	5.000s	146.762us	20	20	100.00
V2		TOTAL			1397	1440	97.01
V2S	tl_intg_err	csrng_sec_cm	12.000s	201.956us	5	5	100.00
		csrng_tl_intg_err	22.000s	1.350ms	20	20	100.00
V2S	sec_cm_config_regwen	csrng_regwen	24.000s	20.414us	50	50	100.00
		csrng_csr_rw	4.000s	30.519us	20	20	100.00
V2S	sec_cm_config_mubi	csrng_alert	1.633m	6.670ms	500	500	100.00
V2S	sec_cm_intersig_mubi	csrng_stress_all	20.683m	53.453ms	49	50	98.00
V2S	sec_cm_main_sm_fsm_sparse	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
		csrng_sec_cm	12.000s	201.956us	5	5	100.00
V2S	sec_cm_update_fsm_sparse	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
		csrng_sec_cm	12.000s	201.956us	5	5	100.00
V2S	sec_cm_blk_enc_fsm_sparse	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
		csrng_sec_cm	12.000s	201.956us	5	5	100.00
V2S	sec_cm_outblk_fsm_sparse	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
		csrng_sec_cm	12.000s	201.956us	5	5	100.00
V2S	sec_cm_gen_cmd_ctr_redun	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
		csrng_sec_cm	12.000s	201.956us	5	5	100.00
V2S	sec_cm_drbg_upd_ctr_redun	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
		csrng_sec_cm	12.000s	201.956us	5	5	100.00
V2S	sec_cm_drbg_gen_ctr_redun	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
		csrng_sec_cm	12.000s	201.956us	5	5	100.00
V2S	sec_cm_ctrl_mubi	csrng_alert	1.633m	6.670ms	500	500	100.00
V2S	sec_cm_main_sm_ctr_local_esc	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
V2S	sec_cm_constants_lc_gated	csrng_stress_all	20.683m	53.453ms	49	50	98.00
V2S	sec_cm_sw_genbits_bus_consistency	csrng_alert	1.633m	6.670ms	500	500	100.00
V2S	sec_cm_tile_link_bus_integrity	csrng_tl_intg_err	22.000s	1.350ms	20	20	100.00
V2S	sec_cm_aes_cipher_fsm_sparse	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
		csrng_sec_cm	12.000s	201.956us	5	5	100.00
V2S	sec_cm_aes_cipher_fsm_redun	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
V2S	sec_cm_aes_cipher_ctrl_sparse	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
V2S	sec_cm_aes_cipher_fsm_local_esc	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
V2S	sec_cm_aes_cipher_ctr_redun	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
		csrng_sec_cm	12.000s	201.956us	5	5	100.00
V2S	sec_cm_aes_cipher_data_reg_local_esc	csrng_intr	42.000s	308.089us	183	200	91.50
		csrng_err	31.000s	21.836us	475	500	95.00
V2S		TOTAL			75	75	100.00
V3	stress_all_with_rand_reset	csrng_stress_all_with_rand_reset	7.400m	26.511ms	10	10	100.00
V3		TOTAL			10	10	100.00
		TOTAL			1587	1630	97.36

Failure Buckets

• UVM_FATAL (csrng_base_vseq.sv:189) virtual_sequencer [csrng_err_vseq] has 14 failures:

  • Test csrng_err has 14 failures.

    • 2.csrng_err.111574876719724854450968592271225728860163453091028593635688667043380873589556
      Line 134, in log /nightly/current_run/scratch/master/csrng-sim-xcelium/2.csrng_err/latest/run.log

        UVM_FATAL @   3543591 ps: (csrng_base_vseq.sv:189) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.csrng_err_vseq]
             ----| PATH NOT FOUND
        UVM_INFO @   3543591 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 33.csrng_err.31438725068151364719878734305343341443108336003655505326805504658893109114745
      Line 134, in log /nightly/current_run/scratch/master/csrng-sim-xcelium/33.csrng_err/latest/run.log

        UVM_FATAL @   2357052 ps: (csrng_base_vseq.sv:189) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.csrng_err_vseq]
             ----| PATH NOT FOUND
        UVM_INFO @   2357052 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 12 more failures.

• UVM_FATAL (csrng_base_vseq.sv:184) virtual_sequencer [csrng_err_vseq] has 11 failures:

  • Test csrng_err has 11 failures.

    • 25.csrng_err.6502398969767185305904670680885833290433397270234361093036031591136823888694
      Line 134, in log /nightly/current_run/scratch/master/csrng-sim-xcelium/25.csrng_err/latest/run.log

        UVM_FATAL @   3028855 ps: (csrng_base_vseq.sv:184) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.csrng_err_vseq]
             ----| PATH NOT FOUND
        UVM_INFO @   3028855 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 34.csrng_err.34959814781695881178353861929500351126270158873241792952338931943046781267321
      Line 134, in log /nightly/current_run/scratch/master/csrng-sim-xcelium/34.csrng_err/latest/run.log

        UVM_FATAL @   4643318 ps: (csrng_base_vseq.sv:184) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.csrng_err_vseq]
             ----| PATH NOT FOUND
        UVM_INFO @   4643318 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 9 more failures.

• UVM_FATAL (csrng_base_vseq.sv:189) virtual_sequencer [csrng_intr_vseq] has 10 failures:

  • Test csrng_intr has 10 failures.

    • 18.csrng_intr.48584302156777063018151798162723205392392310302365681226294314079599851241808
      Line 134, in log /nightly/current_run/scratch/master/csrng-sim-xcelium/18.csrng_intr/latest/run.log

        UVM_FATAL @  85786124 ps: (csrng_base_vseq.sv:189) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.csrng_intr_vseq]
             ----| PATH NOT FOUND
        UVM_INFO @  85786124 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 26.csrng_intr.104530907579084978064113910697083730670834829225761951255654156327615762684921
      Line 134, in log /nightly/current_run/scratch/master/csrng-sim-xcelium/26.csrng_intr/latest/run.log

        UVM_FATAL @  51806745 ps: (csrng_base_vseq.sv:189) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.csrng_intr_vseq]
             ----| PATH NOT FOUND
        UVM_INFO @  51806745 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 8 more failures.

• UVM_FATAL (csrng_base_vseq.sv:184) virtual_sequencer [csrng_intr_vseq] has 7 failures:

  • Test csrng_intr has 7 failures.

    • 7.csrng_intr.4916884290752893297637143726774075019208095934945747258783512857244041482715
      Line 134, in log /nightly/current_run/scratch/master/csrng-sim-xcelium/7.csrng_intr/latest/run.log

        UVM_FATAL @  68836237 ps: (csrng_base_vseq.sv:184) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.csrng_intr_vseq]
             ----| PATH NOT FOUND
        UVM_INFO @  68836237 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • 68.csrng_intr.42111278216460020411670408931575318473408748728228727768991360128005687199593
      Line 134, in log /nightly/current_run/scratch/master/csrng-sim-xcelium/68.csrng_intr/latest/run.log

        UVM_FATAL @  37240999 ps: (csrng_base_vseq.sv:184) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.csrng_intr_vseq]
             ----| PATH NOT FOUND
        UVM_INFO @  37240999 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

    • ... and 5 more failures.

• UVM_ERROR (csrng_scoreboard.sv:166) [scoreboard] Check failed intr_pins[i] === (intr_en[i] & item.d_data[i]) (* [*] vs * [*]) Interrupt_pin: EntropyReq has 1 failures:

  • Test csrng_stress_all has 1 failures.

    • 9.csrng_stress_all.4935084608247662265696156236115946123224167039484924677258557794709574737282
      Line 140, in log /nightly/current_run/scratch/master/csrng-sim-xcelium/9.csrng_stress_all/latest/run.log

        UVM_ERROR @ 53453130766 ps: (csrng_scoreboard.sv:166) [uvm_test_top.env.scoreboard] Check failed intr_pins[i] === (intr_en[i] & item.d_data[i]) (0x1 [1] vs 0x0 [0]) Interrupt_pin: EntropyReq
        UVM_INFO @ 53453130766 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• Job returned non-zero exit code has 1 failures:

  • Test csrng has 1 failures.

    • cov_merge
      Log /nightly/current_run/scratch/master/csrng-sim-xcelium/cov_merge/merged/cov_merge.log

        [Executing]:
        make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk cov_merge cov_merge_cmd=imc cov_merge_opts='-64bit -licqueue -exec /nightly/current_run/opentitan/hw/dv/tools/xcelium/cov_merge.tcl'
      
        [make]: cov_merge
        imc -64bit -licqueue -exec /nightly/current_run/opentitan/hw/dv/tools/xcelium/cov_merge.tcl
        *I,imc.tool.cov.version.diff: "There is a difference between the IMC tool version 22.09 and the coverage version 21.09-s006"
        Error: Cannot invoke "jdk.internal.platform.CgroupInfo.getMountPoint()" because "<parameter1>" is null
        Created log file /nightly/current_run/opentitan/startup.log
        make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:231: cov_merge] Error 1
      

• Job killed most likely because its dependent job failed. has 1 failures:

  • Test csrng has 1 failures.
    • cov_report
      Log /nightly/current_run/scratch/master/csrng-sim-xcelium/cov_report/cov_report.log