6181a2d| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | kmac_smoke | 49.510s | 4.078ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | kmac_csr_hw_reset | 1.270s | 32.762us | 5 | 5 | 100.00 |
| V1 | csr_rw | kmac_csr_rw | 1.050s | 179.796us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | kmac_csr_bit_bash | 10.450s | 1.223ms | 5 | 5 | 100.00 |
| V1 | csr_aliasing | kmac_csr_aliasing | 6.800s | 1.035ms | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | kmac_csr_mem_rw_with_rand_reset | 2.220s | 795.862us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | kmac_csr_rw | 1.050s | 179.796us | 20 | 20 | 100.00 |
| kmac_csr_aliasing | 6.800s | 1.035ms | 5 | 5 | 100.00 | ||
| V1 | mem_walk | kmac_mem_walk | 0.830s | 12.321us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | kmac_mem_partial_access | 1.250s | 24.224us | 5 | 5 | 100.00 |
| V1 | TOTAL | 115 | 115 | 100.00 | |||
| V2 | long_msg_and_output | kmac_long_msg_and_output | 56.392m | 1.560s | 50 | 50 | 100.00 |
| V2 | burst_write | kmac_burst_write | 14.582m | 123.943ms | 50 | 50 | 100.00 |
| V2 | test_vectors | kmac_test_vectors_sha3_224 | 30.829m | 246.978ms | 5 | 5 | 100.00 |
| kmac_test_vectors_sha3_256 | 25.750m | 456.772ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_384 | 23.238m | 137.335ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_512 | 10.333m | 18.554ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_128 | 32.892m | 282.157ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_256 | 29.917m | 162.204ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac | 3.120s | 119.487us | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac_xof | 3.160s | 215.963us | 5 | 5 | 100.00 | ||
| V2 | sideload | kmac_sideload | 7.355m | 232.783ms | 50 | 50 | 100.00 |
| V2 | app | kmac_app | 5.275m | 33.336ms | 50 | 50 | 100.00 |
| V2 | app_with_partial_data | kmac_app_with_partial_data | 3.220m | 21.321ms | 10 | 10 | 100.00 |
| V2 | entropy_refresh | kmac_entropy_refresh | 4.423m | 103.709ms | 50 | 50 | 100.00 |
| V2 | error | kmac_error | 6.409m | 28.828ms | 50 | 50 | 100.00 |
| V2 | key_error | kmac_key_error | 12.590s | 6.638ms | 49 | 50 | 98.00 |
| V2 | sideload_invalid | kmac_sideload_invalid | 2.611m | 10.044ms | 32 | 50 | 64.00 |
| V2 | edn_timeout_error | kmac_edn_timeout_error | 33.380s | 492.138us | 20 | 20 | 100.00 |
| V2 | entropy_mode_error | kmac_entropy_mode_error | 45.190s | 8.309ms | 20 | 20 | 100.00 |
| V2 | entropy_ready_error | kmac_entropy_ready_error | 1.058m | 8.262ms | 10 | 10 | 100.00 |
| V2 | lc_escalation | kmac_lc_escalation | 43.100s | 834.592us | 50 | 50 | 100.00 |
| V2 | stress_all | kmac_stress_all | 46.840m | 676.720ms | 50 | 50 | 100.00 |
| V2 | intr_test | kmac_intr_test | 0.940s | 32.657us | 50 | 50 | 100.00 |
| V2 | alert_test | kmac_alert_test | 1.170s | 237.003us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | kmac_tl_errors | 3.000s | 294.178us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | kmac_tl_errors | 3.000s | 294.178us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | kmac_csr_hw_reset | 1.270s | 32.762us | 5 | 5 | 100.00 |
| kmac_csr_rw | 1.050s | 179.796us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 6.800s | 1.035ms | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 2.210s | 128.746us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | kmac_csr_hw_reset | 1.270s | 32.762us | 5 | 5 | 100.00 |
| kmac_csr_rw | 1.050s | 179.796us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 6.800s | 1.035ms | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 2.210s | 128.746us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 721 | 740 | 97.43 | |||
| V2S | shadow_reg_update_error | kmac_shadow_reg_errors | 1.960s | 123.317us | 20 | 20 | 100.00 |
| V2S | shadow_reg_read_clear_staged_value | kmac_shadow_reg_errors | 1.960s | 123.317us | 20 | 20 | 100.00 |
| V2S | shadow_reg_storage_error | kmac_shadow_reg_errors | 1.960s | 123.317us | 20 | 20 | 100.00 |
| V2S | shadowed_reset_glitch | kmac_shadow_reg_errors | 1.960s | 123.317us | 20 | 20 | 100.00 |
| V2S | shadow_reg_update_error_with_csr_rw | kmac_shadow_reg_errors_with_csr_rw | 3.640s | 2.371ms | 19 | 20 | 95.00 |
| V2S | tl_intg_err | kmac_sec_cm | 55.310s | 5.839ms | 5 | 5 | 100.00 |
| kmac_tl_intg_err | 4.730s | 799.516us | 20 | 20 | 100.00 | ||
| V2S | sec_cm_bus_integrity | kmac_tl_intg_err | 4.730s | 799.516us | 20 | 20 | 100.00 |
| V2S | sec_cm_lc_escalate_en_intersig_mubi | kmac_lc_escalation | 43.100s | 834.592us | 50 | 50 | 100.00 |
| V2S | sec_cm_sw_key_key_masking | kmac_smoke | 49.510s | 4.078ms | 50 | 50 | 100.00 |
| V2S | sec_cm_key_sideload | kmac_sideload | 7.355m | 232.783ms | 50 | 50 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_shadow | kmac_shadow_reg_errors | 1.960s | 123.317us | 20 | 20 | 100.00 |
| V2S | sec_cm_fsm_sparse | kmac_sec_cm | 55.310s | 5.839ms | 5 | 5 | 100.00 |
| V2S | sec_cm_ctr_redun | kmac_sec_cm | 55.310s | 5.839ms | 5 | 5 | 100.00 |
| V2S | sec_cm_packer_ctr_redun | kmac_sec_cm | 55.310s | 5.839ms | 5 | 5 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_regwen | kmac_smoke | 49.510s | 4.078ms | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_global_esc | kmac_lc_escalation | 43.100s | 834.592us | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_local_esc | kmac_sec_cm | 55.310s | 5.839ms | 5 | 5 | 100.00 |
| V2S | sec_cm_absorbed_ctrl_mubi | kmac_mubi | 5.121m | 85.442ms | 10 | 10 | 100.00 |
| V2S | sec_cm_sw_cmd_ctrl_sparse | kmac_smoke | 49.510s | 4.078ms | 50 | 50 | 100.00 |
| V2S | TOTAL | 74 | 75 | 98.67 | |||
| V3 | stress_all_with_rand_reset | kmac_stress_all_with_rand_reset | 3.754m | 3.495ms | 7 | 10 | 70.00 |
| V3 | TOTAL | 7 | 10 | 70.00 | |||
| TOTAL | 917 | 940 | 97.55 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 93.88 | 97.69 | 94.41 | 100.00 | 73.55 | 96.04 | 99.35 | 96.12 |
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) has 3 failures:
5.kmac_sideload_invalid.67373806072955902707600146575570941258630498665193122274307961371216729948616
Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/5.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10008843263 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x8eca2000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10008843263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
29.kmac_sideload_invalid.50626917083108526740847229853072433603610845073630427867858828230010221752874
Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/29.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10025375490 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x7720f000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10025375490 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_ERROR (cip_base_vseq.sv:945) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 2 failures:
1.kmac_stress_all_with_rand_reset.100223770264105535806439063921272301540598238369984975054970884053635999623175
Line 97, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/1.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 1665403307 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 1665403307 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
2.kmac_stress_all_with_rand_reset.106205259311745437592429441195182294741103360715709014394453124214761960891753
Line 329, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/2.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 31675570368 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
UVM_INFO @ 31675570368 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7) has 2 failures:
3.kmac_sideload_invalid.8006529802033106589333930844658809233733191504060859230038092172506415125435
Line 81, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/3.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10033174227 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x5bace000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)
UVM_INFO @ 10033174227 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
34.kmac_sideload_invalid.53609641403218028995583779824293111050125620819652046291817580134549996534298
Line 80, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/34.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10300777593 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xa196f000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)
UVM_INFO @ 10300777593 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 2 failures:
9.kmac_sideload_invalid.14665648551557141795110911168566150843026414234720696781104846390924565247935
Line 76, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/9.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10016371236 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x91fe5000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10016371236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
48.kmac_sideload_invalid.111418078187511388355305216093020263748711760275316037671401092064644401866375
Line 76, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/48.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10083346502 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x7c574000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10083346502 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=11) has 2 failures:
13.kmac_sideload_invalid.34132455905120117141633265500709912473512252638825920692736722909780853622661
Line 84, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/13.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10162694383 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xa2305000, Comparison=CompareOpEq, exp_data=0x1, call_count=11)
UVM_INFO @ 10162694383 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
16.kmac_sideload_invalid.15273763552425000313098376250920832217681593937458837446175104615067371642720
Line 85, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/16.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10374123831 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe749b000, Comparison=CompareOpEq, exp_data=0x1, call_count=11)
UVM_INFO @ 10374123831 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=18) has 2 failures:
23.kmac_sideload_invalid.17380548175317183930565212652297356506667068375603077929006482311723170143618
Line 91, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/23.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10507077616 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xf092e000, Comparison=CompareOpEq, exp_data=0x1, call_count=18)
UVM_INFO @ 10507077616 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
31.kmac_sideload_invalid.99117320227397283769942410170846365667219732687179323990311030363097795487507
Line 93, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/31.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10286916481 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x96b9a000, Comparison=CompareOpEq, exp_data=0x1, call_count=18)
UVM_INFO @ 10286916481 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: kmac_reg_block.prefix_*.prefix_* reset value: * has 1 failures:
0.kmac_shadow_reg_errors_with_csr_rw.64609027928370817107957274231566639251456914897921069899020164251123307357093
Line 191, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/0.kmac_shadow_reg_errors_with_csr_rw/latest/run.log
UVM_ERROR @ 62076658 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1950059741 [0x743b8cdd] vs 0 [0x0]) Regname: kmac_reg_block.prefix_5.prefix_0 reset value: 0x0
UVM_INFO @ 62076658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:525) [kmac_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 1 failures:
5.kmac_stress_all_with_rand_reset.18386341458151355489401659625558552833250888630157662606295948428984246259081
Line 198, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/5.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 1619489468 ps: (cip_base_vseq.sv:525) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed data & ~ro_mask == 0 (4 [0x4] vs 0 [0x0])
UVM_INFO @ 1619489468 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) has 1 failures:
6.kmac_sideload_invalid.66703491108895075020762757439903470148479513402871868049805427260442445954452
Line 81, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/6.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10044081709 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x2b8b2000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)
UVM_INFO @ 10044081709 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=14) has 1 failures:
12.kmac_sideload_invalid.109061180348221719651897436908331865743493835138988059388395074922489240470416
Line 88, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/12.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10058162464 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x2a220000, Comparison=CompareOpEq, exp_data=0x1, call_count=14)
UVM_INFO @ 10058162464 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=16) has 1 failures:
14.kmac_sideload_invalid.43638032802851802081237597241411037857564889724789865026357735643505504910182
Line 89, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/14.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10210980863 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x16726000, Comparison=CompareOpEq, exp_data=0x1, call_count=16)
UVM_INFO @ 10210980863 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=5) has 1 failures:
15.kmac_sideload_invalid.35473917624624301076196728177775622951493138492595908115903830584767915954934
Line 79, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/15.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10169353216 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe61d5000, Comparison=CompareOpEq, exp_data=0x1, call_count=5)
UVM_INFO @ 10169353216 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=24) has 1 failures:
17.kmac_sideload_invalid.32913845831479835152943648934331957268475482760970103306526540377967027781233
Line 99, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/17.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10480225914 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x5d351000, Comparison=CompareOpEq, exp_data=0x1, call_count=24)
UVM_INFO @ 10480225914 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=15) has 1 failures:
18.kmac_sideload_invalid.17055717622309124107147235546537252235169640679915894834514336118970249562917
Line 92, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/18.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10385309246 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xd94fc000, Comparison=CompareOpEq, exp_data=0x1, call_count=15)
UVM_INFO @ 10385309246 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6) has 1 failures:
45.kmac_sideload_invalid.58441791811221993905405591023623877159465477894415337793425399289421782045999
Line 81, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/45.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10122813533 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x4f753000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
UVM_INFO @ 10122813533 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (kmac_base_vseq.sv:382) [kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == *) intr_pins[KmacErr] is not set! has 1 failures:
49.kmac_key_error.63266794194021404855351351975366364021322317473372044877134400680693578734944
Line 90, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/49.kmac_key_error/latest/run.log
UVM_ERROR @ 735585514 ps: (kmac_base_vseq.sv:382) [uvm_test_top.env.virtual_sequencer.kmac_key_error_vseq] Check failed (intr_pins[KmacErr] == 1) intr_pins[KmacErr] is not set!
UVM_INFO @ 735585514 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---