MBX Simulation Results

Friday September 05 2025 17:04:13 UTC

GitHub Revision: 6181a2d

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 mbx_smoke mbx_smoke 1.017m 16.206ms 2 2 100.00
V1 csr_hw_reset mbx_csr_hw_reset 3.000s 43.056us 5 5 100.00
V1 csr_rw mbx_csr_rw 3.000s 25.942us 20 20 100.00
V1 csr_bit_bash mbx_csr_bit_bash 4.000s 235.001us 5 5 100.00
V1 csr_aliasing mbx_csr_aliasing 3.000s 18.477us 5 5 100.00
V1 csr_mem_rw_with_rand_reset mbx_csr_mem_rw_with_rand_reset 4.000s 24.459us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr mbx_csr_rw 3.000s 25.942us 20 20 100.00
mbx_csr_aliasing 3.000s 18.477us 5 5 100.00
V1 TOTAL 57 57 100.00
V2 mbx_stress mbx_stress 1.017m 4.997ms 1 2 50.00
V2 mbx_max_activity mbx_stress_zero_delays 1.833m 4.161ms 1 2 50.00
V2 mbx_imbx_oob mbx_imbx_oob 12.000s 618.420us 0 2 0.00
V2 mbx_doe_intr_msg mbx_doe_intr_msg 32.000s 3.839ms 5 5 100.00
V2 alert_test mbx_alert_test 3.000s 34.195us 50 50 100.00
V2 intr_test mbx_intr_test 3.000s 41.416us 50 50 100.00
V2 tl_d_oob_addr_access mbx_tl_errors 6.000s 308.135us 20 20 100.00
V2 tl_d_illegal_access mbx_tl_errors 6.000s 308.135us 20 20 100.00
V2 tl_d_outstanding_access mbx_csr_hw_reset 3.000s 43.056us 5 5 100.00
mbx_csr_rw 3.000s 25.942us 20 20 100.00
mbx_csr_aliasing 3.000s 18.477us 5 5 100.00
mbx_same_csr_outstanding 3.000s 25.717us 20 20 100.00
V2 tl_d_partial_access mbx_csr_hw_reset 3.000s 43.056us 5 5 100.00
mbx_csr_rw 3.000s 25.942us 20 20 100.00
mbx_csr_aliasing 3.000s 18.477us 5 5 100.00
mbx_same_csr_outstanding 3.000s 25.717us 20 20 100.00
V2 TOTAL 147 151 97.35
V2S tl_intg_err mbx_tl_intg_err 4.000s 150.937us 20 20 100.00
mbx_sec_cm 3.000s 13.022us 5 5 100.00
V2S TOTAL 25 25 100.00
TOTAL 229 233 98.28

Failure Buckets