6181a2d| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | spi_host_smoke | 2.583m | 18.709ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | spi_host_csr_hw_reset | 3.000s | 87.952us | 5 | 5 | 100.00 |
| V1 | csr_rw | spi_host_csr_rw | 3.000s | 17.278us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | spi_host_csr_bit_bash | 5.000s | 158.956us | 5 | 5 | 100.00 |
| V1 | csr_aliasing | spi_host_csr_aliasing | 3.000s | 44.425us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | spi_host_csr_mem_rw_with_rand_reset | 3.000s | 26.943us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | spi_host_csr_rw | 3.000s | 17.278us | 20 | 20 | 100.00 |
| spi_host_csr_aliasing | 3.000s | 44.425us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | spi_host_mem_walk | 3.000s | 27.246us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | spi_host_mem_partial_access | 3.000s | 89.531us | 5 | 5 | 100.00 |
| V1 | TOTAL | 115 | 115 | 100.00 | |||
| V2 | performance | spi_host_performance | 33.000s | 63.125us | 50 | 50 | 100.00 |
| V2 | error_event_intr | spi_host_overflow_underflow | 46.000s | 3.048ms | 50 | 50 | 100.00 |
| spi_host_error_cmd | 20.000s | 16.851us | 50 | 50 | 100.00 | ||
| spi_host_event | 17.533m | 132.313ms | 50 | 50 | 100.00 | ||
| V2 | clock_rate | spi_host_speed | 39.000s | 404.162us | 49 | 50 | 98.00 |
| V2 | speed | spi_host_speed | 39.000s | 404.162us | 49 | 50 | 98.00 |
| V2 | chip_select_timing | spi_host_speed | 39.000s | 404.162us | 49 | 50 | 98.00 |
| V2 | sw_reset | spi_host_sw_reset | 2.200m | 11.683ms | 50 | 50 | 100.00 |
| V2 | passthrough_mode | spi_host_passthrough_mode | 16.000s | 42.794us | 50 | 50 | 100.00 |
| V2 | cpol_cpha | spi_host_speed | 39.000s | 404.162us | 49 | 50 | 98.00 |
| V2 | full_cycle | spi_host_speed | 39.000s | 404.162us | 49 | 50 | 98.00 |
| V2 | duplex | spi_host_smoke | 2.583m | 18.709ms | 50 | 50 | 100.00 |
| V2 | tx_rx_only | spi_host_smoke | 2.583m | 18.709ms | 50 | 50 | 100.00 |
| V2 | stress_all | spi_host_stress_all | 1.400m | 7.643ms | 50 | 50 | 100.00 |
| V2 | spien | spi_host_spien | 2.567m | 13.828ms | 50 | 50 | 100.00 |
| V2 | stall | spi_host_status_stall | 3.550m | 16.180ms | 48 | 50 | 96.00 |
| V2 | Idlecsbactive | spi_host_idlecsbactive | 55.000s | 2.557ms | 50 | 50 | 100.00 |
| V2 | data_fifo_status | spi_host_overflow_underflow | 46.000s | 3.048ms | 50 | 50 | 100.00 |
| V2 | alert_test | spi_host_alert_test | 3.000s | 17.153us | 50 | 50 | 100.00 |
| V2 | intr_test | spi_host_intr_test | 3.000s | 45.364us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | spi_host_tl_errors | 5.000s | 188.892us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | spi_host_tl_errors | 5.000s | 188.892us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | spi_host_csr_hw_reset | 3.000s | 87.952us | 5 | 5 | 100.00 |
| spi_host_csr_rw | 3.000s | 17.278us | 20 | 20 | 100.00 | ||
| spi_host_csr_aliasing | 3.000s | 44.425us | 5 | 5 | 100.00 | ||
| spi_host_same_csr_outstanding | 3.000s | 82.826us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | spi_host_csr_hw_reset | 3.000s | 87.952us | 5 | 5 | 100.00 |
| spi_host_csr_rw | 3.000s | 17.278us | 20 | 20 | 100.00 | ||
| spi_host_csr_aliasing | 3.000s | 44.425us | 5 | 5 | 100.00 | ||
| spi_host_same_csr_outstanding | 3.000s | 82.826us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 687 | 690 | 99.57 | |||
| V2S | tl_intg_err | spi_host_tl_intg_err | 4.000s | 153.271us | 20 | 20 | 100.00 |
| spi_host_sec_cm | 3.000s | 72.159us | 5 | 5 | 100.00 | ||
| V2S | sec_cm_bus_integrity | spi_host_tl_intg_err | 4.000s | 153.271us | 20 | 20 | 100.00 |
| V2S | TOTAL | 25 | 25 | 100.00 | |||
| Unmapped tests | spi_host_upper_range_clkdiv | 12.933m | 48.408ms | 7 | 10 | 70.00 | |
| TOTAL | 834 | 840 | 99.29 |
UVM_FATAL (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 3 failures:
3.spi_host_upper_range_clkdiv.58599050830452437906586419855562053568580577334900040951114195613678066704595
Line 150, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/3.spi_host_upper_range_clkdiv/latest/run.log
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
7.spi_host_upper_range_clkdiv.75390169309363846130281765619755672859598058923214881326229723868813259285901
Line 134, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/7.spi_host_upper_range_clkdiv/latest/run.log
UVM_FATAL @ 200000000000 ps: (uvm_phase.svh:1521) [PH_TIMEOUT] Explicit timeout of 200000000000 ps hit, indicating a probable testbench issue
UVM_INFO @ 200000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/spi_host-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_spi_host_sva_*/spi_host_data_stable_sva.sv,104): Assertion NEGEDGE_SAME_VALUE_CHECK_P has failed has 2 failures:
8.spi_host_status_stall.109465619268972704472029753010103290584379036873759043183001811406809857526830
Line 769, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/8.spi_host_status_stall/latest/run.log
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/spi_host-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_spi_host_sva_0.1/spi_host_data_stable_sva.sv,104): (time 875707785 PS) Assertion tb.dut.spi_host_data_stable_assert.u_sva_cio_sd_i_whole_cycle_data_stable_check.g_signal_stable_sva[1].NEGEDGE_SAME_VALUE_CHECK_P has failed
UVM_ERROR @ 875707785 ps: [NEGEDGE_SAME_VALUE_CHECK_P] tb.dut.spi_host_data_stable_assert.u_sva_cio_sd_i_whole_cycle_data_stable_check.g_signal_stable_sva[1]: [i=1] - ASSERTION FAILED pos_value (0x1) != neg_value (0x1) - time=875708000 ps
UVM_INFO @ 875707785 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
40.spi_host_status_stall.72048600484033218142005010889455257399952316385306882253283144196558749581166
Line 775, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/40.spi_host_status_stall/latest/run.log
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/spi_host-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_spi_host_sva_0.1/spi_host_data_stable_sva.sv,104): (time 261946805 PS) Assertion tb.dut.spi_host_data_stable_assert.u_sva_cio_sd_i_whole_cycle_data_stable_check.g_signal_stable_sva[1].NEGEDGE_SAME_VALUE_CHECK_P has failed
UVM_ERROR @ 261946805 ps: [NEGEDGE_SAME_VALUE_CHECK_P] tb.dut.spi_host_data_stable_assert.u_sva_cio_sd_i_whole_cycle_data_stable_check.g_signal_stable_sva[1]: [i=1] - ASSERTION FAILED pos_value (0x0) != neg_value (0x0) - time=261947000 ps
UVM_INFO @ 261946805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (spi_host_base_vseq.sv:237) virtual_sequencer [spi_host_env_pkg::spi_host_base_vseq.stoppable_timeout()] timeout = *ns spi_host_reg_block.status.rxqd (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=* has 1 failures:
16.spi_host_speed.17473804960455447732558463175671831374725754390044035364976234315989430594547
Line 316, in log /nightly/current_run/scratch/master/spi_host-sim-xcelium/16.spi_host_speed/latest/run.log
UVM_FATAL @ 10097161179 ps: (spi_host_base_vseq.sv:237) uvm_test_top.env.virtual_sequencer [spi_host_env_pkg::spi_host_base_vseq.stoppable_timeout()] timeout = 10000000ns spi_host_reg_block.status.rxqd (addr=0xc1f2914, Comparison=CompareOpEq, exp_data=0x0, call_count=48
UVM_INFO @ 10097161179 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Job returned non-zero exit code has 1 failures:
cov_merge
Log /nightly/current_run/scratch/master/spi_host-sim-xcelium/cov_merge/merged/cov_merge.log
[Executing]:
make -f /nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk cov_merge cov_merge_cmd=imc cov_merge_opts='-64bit -licqueue -exec /nightly/current_run/opentitan/hw/dv/tools/xcelium/cov_merge.tcl'
[make]: cov_merge
imc -64bit -licqueue -exec /nightly/current_run/opentitan/hw/dv/tools/xcelium/cov_merge.tcl
*I,imc.tool.cov.version.diff: "There is a difference between the IMC tool version 22.09 and the coverage version 21.09-s006"
Error: Cannot invoke "jdk.internal.platform.CgroupInfo.getMountPoint()" because "<parameter1>" is null
Created log file /nightly/current_run/opentitan/startup.log
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:231: cov_merge] Error 1
Job killed most likely because its dependent job failed. has 1 failures: