| V1 |
smoke |
aon_timer_smoke |
2.260s |
670.158us |
5 |
5 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.680s |
792.493us |
5 |
5 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
2.240s |
522.829us |
20 |
20 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
21.190s |
12.419ms |
5 |
5 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.590s |
527.000us |
5 |
5 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.580s |
461.506us |
20 |
20 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
2.240s |
522.829us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.590s |
527.000us |
5 |
5 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.140s |
438.022us |
5 |
5 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.670s |
463.130us |
5 |
5 |
100.00 |
| V1 |
|
TOTAL |
|
|
70 |
70 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.220m |
61.729ms |
15 |
15 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.130s |
585.577us |
5 |
5 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
2.082m |
74.269ms |
15 |
15 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.990s |
515.938us |
50 |
50 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.910s |
461.274us |
50 |
50 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
3.140s |
593.812us |
20 |
20 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
3.140s |
593.812us |
20 |
20 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.680s |
792.493us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
2.240s |
522.829us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.590s |
527.000us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
4.230s |
2.742ms |
20 |
20 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.680s |
792.493us |
5 |
5 |
100.00 |
|
|
aon_timer_csr_rw |
2.240s |
522.829us |
20 |
20 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.590s |
527.000us |
5 |
5 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
4.230s |
2.742ms |
20 |
20 |
100.00 |
| V2 |
|
TOTAL |
|
|
175 |
175 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
11.990s |
7.747ms |
5 |
5 |
100.00 |
|
|
aon_timer_tl_intg_err |
12.640s |
8.617ms |
20 |
20 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
12.640s |
8.617ms |
20 |
20 |
100.00 |
| V2S |
|
TOTAL |
|
|
25 |
25 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
2.110s |
565.633us |
5 |
5 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.970s |
640.816us |
5 |
5 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
11.330s |
3.243ms |
5 |
5 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.950s |
530.854us |
10 |
10 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
16.100s |
4.183ms |
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
39.600s |
18.258ms |
15 |
15 |
100.00 |
| V3 |
|
TOTAL |
|
|
45 |
45 |
100.00 |
|
|
TOTAL |
|
|
315 |
315 |
100.00 |