I2C Simulation Results

Friday September 12 2025 21:26:36 UTC

GitHub Revision: `e14e4d4`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	host_smoke	i2c_host_smoke	1.321m	2.091ms	50	50	100.00
V1	target_smoke	i2c_target_smoke	43.320s	4.678ms	50	50	100.00
V1	csr_hw_reset	i2c_csr_hw_reset	1.020s	20.323us	5	5	100.00
V1	csr_rw	i2c_csr_rw	1.100s	85.569us	20	20	100.00
V1	csr_bit_bash	i2c_csr_bit_bash	5.100s	7.553ms	5	5	100.00
V1	csr_aliasing	i2c_csr_aliasing	2.180s	460.011us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	i2c_csr_mem_rw_with_rand_reset	1.750s	100.957us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	i2c_csr_rw	1.100s	85.569us	20	20	100.00
		i2c_csr_aliasing	2.180s	460.011us	5	5	100.00
V1		TOTAL			155	155	100.00
V2	host_error_intr	i2c_host_error_intr	5.540s	548.205us	7	50	14.00
V2	host_stress_all	i2c_host_stress_all	56.220m	91.503ms	10	50	20.00
V2	host_maxperf	i2c_host_perf	43.389m	74.185ms	49	50	98.00
V2	host_override	i2c_host_override	1.020s	103.931us	50	50	100.00
V2	host_fifo_watermark	i2c_host_fifo_watermark	4.597m	20.980ms	50	50	100.00
V2	host_fifo_overflow	i2c_host_fifo_overflow	2.490m	10.171ms	50	50	100.00
V2	host_fifo_reset	i2c_host_fifo_reset_fmt	1.680s	314.696us	50	50	100.00
		i2c_host_fifo_fmt_empty	22.700s	884.379us	50	50	100.00
		i2c_host_fifo_reset_rx	13.130s	990.952us	50	50	100.00
V2	host_fifo_full	i2c_host_fifo_full	3.431m	3.588ms	50	50	100.00
V2	host_timeout	i2c_host_stretch_timeout	45.690s	4.898ms	50	50	100.00
V2	i2c_host_mode_toggle	i2c_host_mode_toggle	5.600s	683.533us	14	50	28.00
V2	target_glitch	i2c_target_glitch	3.070s	447.422us	0	2	0.00
V2	target_stress_all	i2c_target_stress_all	9.364m	42.757ms	50	50	100.00
V2	target_maxperf	i2c_target_perf	8.840s	11.335ms	50	50	100.00
V2	target_fifo_empty	i2c_target_stress_rd	1.066m	3.269ms	50	50	100.00
		i2c_target_intr_smoke	11.530s	7.276ms	50	50	100.00
V2	target_fifo_reset	i2c_target_fifo_reset_acq	2.450s	293.066us	50	50	100.00
		i2c_target_fifo_reset_tx	2.380s	227.942us	50	50	100.00
V2	target_fifo_full	i2c_target_stress_wr	13.867m	57.714ms	50	50	100.00
		i2c_target_stress_rd	1.066m	3.269ms	50	50	100.00
		i2c_target_intr_stress_wr	5.150m	22.698ms	49	50	98.00
V2	target_timeout	i2c_target_timeout	9.930s	3.453ms	50	50	100.00
V2	target_clock_stretch	i2c_target_stretch	1.657m	2.510ms	45	50	90.00
V2	bad_address	i2c_target_bad_addr	8.670s	2.415ms	50	50	100.00
V2	target_mode_glitch	i2c_target_hrst	31.940s	10.224ms	26	50	52.00
V2	target_fifo_watermark	i2c_target_fifo_watermarks_acq	4.290s	2.248ms	50	50	100.00
		i2c_target_fifo_watermarks_tx	2.140s	175.214us	50	50	100.00
V2	host_mode_config_perf	i2c_host_perf	43.389m	74.185ms	49	50	98.00
		i2c_host_perf_precise	5.599m	6.150ms	50	50	100.00
V2	host_mode_clock_stretching	i2c_host_stretch_timeout	45.690s	4.898ms	50	50	100.00
V2	target_mode_tx_stretch_ctrl	i2c_target_tx_stretch_ctrl	30.870s	1.849ms	48	50	96.00
V2	target_mode_nack_generation	i2c_target_nack_acqfull	3.980s	6.878ms	50	50	100.00
		i2c_target_nack_acqfull_addr	3.920s	2.436ms	50	50	100.00
		i2c_target_nack_txstretch	2.200s	880.927us	32	50	64.00
V2	host_mode_halt_on_nak	i2c_host_may_nack	22.520s	549.363us	50	50	100.00
V2	target_mode_smbus_maxlen	i2c_target_smbus_maxlen	3.400s	557.363us	50	50	100.00
V2	alert_test	i2c_alert_test	0.960s	17.844us	50	50	100.00
V2	intr_test	i2c_intr_test	1.020s	18.758us	50	50	100.00
V2	tl_d_oob_addr_access	i2c_tl_errors	2.950s	125.628us	20	20	100.00
V2	tl_d_illegal_access	i2c_tl_errors	2.950s	125.628us	20	20	100.00
V2	tl_d_outstanding_access	i2c_csr_hw_reset	1.020s	20.323us	5	5	100.00
		i2c_csr_rw	1.100s	85.569us	20	20	100.00
		i2c_csr_aliasing	2.180s	460.011us	5	5	100.00
		i2c_same_csr_outstanding	1.610s	130.352us	20	20	100.00
V2	tl_d_partial_access	i2c_csr_hw_reset	1.020s	20.323us	5	5	100.00
		i2c_csr_rw	1.100s	85.569us	20	20	100.00
		i2c_csr_aliasing	2.180s	460.011us	5	5	100.00
		i2c_same_csr_outstanding	1.610s	130.352us	20	20	100.00
V2		TOTAL			1620	1792	90.40
V2S	tl_intg_err	i2c_tl_intg_err	2.770s	2.264ms	20	20	100.00
		i2c_sec_cm	1.370s	264.585us	5	5	100.00
V2S	sec_cm_bus_integrity	i2c_tl_intg_err	2.770s	2.264ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	host_stress_all_with_rand_reset	i2c_host_stress_all_with_rand_reset	36.730s	4.502ms	0	10	0.00
V3	target_error_intr	i2c_target_unexp_stop	3.520s	2.241ms	0	50	0.00
V3	target_stress_all_with_rand_reset	i2c_target_stress_all_with_rand_reset	17.390s	2.219ms	0	10	0.00
V3		TOTAL			0	70	0.00
		TOTAL			1800	2042	88.15

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
84.21	97.31	89.33	74.17	48.21	93.97	96.41	90.06

Failure Buckets

UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between has 88 failures:

Test i2c_host_error_intr has 42 failures.

0.i2c_host_error_intr.19659295762356321946263388393002386706704565851423574590174335892522323255008
Line 91, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log

  UVM_ERROR @  59719668 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  59719668 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_error_intr.108320713719101976557602846633068512456184757829555841151495090503608691584353
Line 91, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_error_intr/latest/run.log

  UVM_ERROR @ 140043680 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 140043680 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 40 more failures.

Test i2c_host_mode_toggle has 17 failures.

0.i2c_host_mode_toggle.40913164503108708289981774970474150958204894416440116641499869204050152120525
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 158529679 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 158529679 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

6.i2c_host_mode_toggle.96884058943942488581600469790965716196516501664927929920937536527909849352137
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  67063655 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  67063655 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 15 more failures.

Test i2c_host_stress_all has 25 failures.

1.i2c_host_stress_all.3934271651428892339559788338388734654852645644116842590193059879826659099241
Line 107, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 34381908899 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 34381908899 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

2.i2c_host_stress_all.59997489909867841119877628367253746040764388852033193232084181530497564363523
Line 104, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 2058553242 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 2058553242 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 23 more failures.

Test i2c_target_stress_all_with_rand_reset has 4 failures.

2.i2c_target_stress_all_with_rand_reset.81995538031974787509001879630640261557274420632714382248613811120203152851520
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @  49526951 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  49526951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

3.i2c_target_stress_all_with_rand_reset.88381414872797768925447056059516548500070448231783674287895199951676123889188
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @  26515427 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  26515427 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 2 more failures.

UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 36 failures:
- Test i2c_target_unexp_stop has 36 failures.
  - 0.i2c_target_unexp_stop.64407369133566073286874120538625552765192549419337486655601566884352124004969
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 659980369 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 161 [0xa1])
  UVM_INFO @ 659980369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 1.i2c_target_unexp_stop.16380364143947575003992950679629347468978067789247409019291436016840274435805
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @  82920840 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 41 [0x29])
  UVM_INFO @  82920840 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 34 more failures.
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 24 failures:
- Test i2c_target_hrst has 24 failures.
  - 5.i2c_target_hrst.104943986584508694345420488433761354061757090604099794991610060929917717662902
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 12271152645 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 12271152645 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 6.i2c_target_hrst.80316668890605971738979570848586593190514449559494278467480576545340634436078
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10917139542 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10917139542 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 22 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: * has 18 failures:
- Test i2c_target_nack_txstretch has 18 failures.
  - 1.i2c_target_nack_txstretch.17556051619689995660003896406885048536490175856187828144676569818065149495407
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 158296274 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 158296274 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 6.i2c_target_nack_txstretch.93540835026304206847033721240513577659332019267614243857022545620190883259752
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 607948692 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 607948692 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 16 more failures.

UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 17 failures:

Test i2c_host_mode_toggle has 7 failures.

3.i2c_host_mode_toggle.22107376618806902885668624838995796717990449303093383580122146030212286017349
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 598550913 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @114500

4.i2c_host_mode_toggle.105645363709126587841530023060251862859081342324002005023373846077546857126031
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  75093239 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @11218

... and 5 more failures.

Test i2c_host_stress_all has 10 failures.

4.i2c_host_stress_all.114856601447350418633118022952395495697808866332859307807336369314702629733846
Line 116, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 39202877466 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @3377629

7.i2c_host_stress_all.85296501225661899312330543879138750195382651683373656529167983448813858556302
Line 164, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 40454403190 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @6141817

... and 8 more failures.

UVM_ERROR (cip_base_vseq.sv:945) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 15 failures:

Test i2c_host_stress_all_with_rand_reset has 10 failures.

0.i2c_host_stress_all_with_rand_reset.82373492279839532136367304352330956671149023485004949080833232440937646689751
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 535612159 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 535612159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all_with_rand_reset.84236594334138299373778297564930284127333248285675921376674090674601830083745
Line 85, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 302055781 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 302055781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

Test i2c_target_stress_all_with_rand_reset has 5 failures.

0.i2c_target_stress_all_with_rand_reset.73373475187793036994834185131991218978793403477339111215282051969589661659867
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1789212763 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 1789212763 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

4.i2c_target_stress_all_with_rand_reset.8225723906257573653883916233762071206788603938321227881507731146209153505649
Line 87, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 2218706945 ps: (cip_base_vseq.sv:945) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 2218706945 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 3 more failures.

UVM_ERROR (i2c_base_vseq.sv:1474) [i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (* [*] vs * [*]) has 10 failures:
- Test i2c_target_unexp_stop has 10 failures.
  - 5.i2c_target_unexp_stop.102531093138034523390577413240156661968159702481996036457024813266608778900192
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 133956400 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 133956400 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 8.i2c_target_unexp_stop.70438723399805135634291768547281164951058669906917583552459024836195133798932
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 212415663 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 212415663 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 8 more failures.

UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead has 8 failures:

Test i2c_host_mode_toggle has 8 failures.

7.i2c_host_mode_toggle.101943004394403049089396911904195509197520683636015459734325825120899764688411
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  30987368 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

10.i2c_host_mode_toggle.99140402822135073476719341542092867827138695033100769530713527080223408849078
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/10.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  79280055 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

... and 6 more failures.

UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred! has 5 failures:
- Test i2c_target_stretch has 5 failures.
  - 2.i2c_target_stretch.10852385355506847866351929582521857182281737179866221041827447622853357347553
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10003134144 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10003134144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 4.i2c_target_stretch.56289163625520797023505323031207458552593823754409213741282678606188021748301
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10075256519 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10075256519 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 3 more failures.
Job timed out after * minutes has 4 failures:
- Test i2c_host_stress_all has 3 failures.
  - 0.i2c_host_stress_all.75494345491534078214309745494645729614099816072543107798962440168574202301782
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
  - 19.i2c_host_stress_all.46533720124198003176153050246622784612451134563097248668462188144216197269164
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/19.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```
  - ... and 1 more failures.
- Test i2c_host_perf has 1 failures.
  - 36.i2c_host_perf.97038403930823692404030089038805434445546038342940140162069460316539680298909
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/36.i2c_host_perf/latest/run.log
```
  Job timed out after 60 minutes
```

Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))' has 4 failures:

Test i2c_target_unexp_stop has 4 failures.

6.i2c_target_unexp_stop.106127532585678191919188262739437726741598167331605785420834789225177640752646
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 116107105 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 116107105 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

36.i2c_target_unexp_stop.114028880617418531778466103682722437645344278356230249033302402623778173708370
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/36.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 298817159 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 298817159 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 2 more failures.

UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 3 failures:
- Test i2c_host_mode_toggle has 3 failures.
  - 27.i2c_host_mode_toggle.25823862041052023070767760220496686475343650639752536611943043848144728047638
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/27.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @ 124733370 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0xcb82e114, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @ 124733370 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 39.i2c_host_mode_toggle.91817157205965149177116861751065856304342357246035988288417177017639518316150
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/39.i2c_host_mode_toggle/latest/run.log
```
  UVM_FATAL @ 103735027 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x6b803d94, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @ 103735027 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 1 more failures.

UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 2 failures:

Test i2c_target_glitch has 2 failures.

0.i2c_target_glitch.77906376840695959996416919868796388100465201362081066559696183510694050195200
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 447422203 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 447422203 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_glitch.84142918559354851115718904989798133084865090759609864964977370105412678811113
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 2070237017 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 2070237017 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Error-[CNST-CIF] Constraints inconsistency failure has 2 failures:
- Test i2c_target_tx_stretch_ctrl has 2 failures.
  - 40.i2c_target_tx_stretch_ctrl.114596874552837196184291779434143369350664159366109132305170058778372862277087
    Line 121, in log /nightly/current_run/scratch/master/i2c-sim-vcs/40.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
  - 48.i2c_target_tx_stretch_ctrl.28965738619094108247887289975458755264041724336297023487899588982107038810880
    Line 127, in log /nightly/current_run/scratch/master/i2c-sim-vcs/48.i2c_target_tx_stretch_ctrl/latest/run.log
```
  Error-[CNST-CIF] Constraints inconsistency failure
  src/lowrisc_dv_i2c_env_0.1/seq_lib/i2c_base_vseq.sv, 872
    Constraints are inconsistent and cannot be solved.
    Please check the inconsistent constraints being printed above and rewrite
    them.
```
UVM_ERROR (cip_base_vseq.sv:849) [i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items. has 1 failures:
- Test i2c_target_stress_all_with_rand_reset has 1 failures.
  - 1.i2c_target_stress_all_with_rand_reset.52994998983501846242917871299533981403518481748302541565992334700366223108206
    Line 86, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 1743159311 ps: (cip_base_vseq.sv:849) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (cfg.can_reset_with_csr_accesses || !has_outstanding_access()) Trying to trigger a reset with outstanding CSR items.
  UVM_INFO @ 1743159311 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Error-[NOA] Null object access has 1 failures:
- Test i2c_host_mode_toggle has 1 failures.
  - 2.i2c_host_mode_toggle.61309042294953897909610458428413618652236039120503495344986684693573051185894
    Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_mode_toggle/latest/run.log
```
  Error-[NOA] Null object access
  src/lowrisc_dv_i2c_env_0.1/i2c_reference_model.sv, 584
    The object at dereference depth 0 is being used before it was
    constructed/allocated.
    Please make sure that the object is allocated before using it.
```
UVM_FATAL (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred! has 1 failures:
- Test i2c_target_intr_stress_wr has 1 failures.
  - 13.i2c_target_intr_stress_wr.78716655854736365626257133398621957954472071009233400614931190535156770682775
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/13.i2c_target_intr_stress_wr/latest/run.log
```
  UVM_FATAL @ 11410602760 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 11410602760 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpWrite has 1 failures:
- Test i2c_host_error_intr has 1 failures.
  - 29.i2c_host_error_intr.85953330614414755953862987922760783746802850573457888220337561967403985218415
    Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/29.i2c_host_error_intr/latest/run.log
```
  UVM_ERROR @  16642135 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpWrite
  --> EXP:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
```
UVM_ERROR (i2c_scoreboard.sv:717) [scoreboard] controller_mode_wr_obs_fifo item uncompared: has 1 failures:
- Test i2c_host_stress_all has 1 failures.
  - 40.i2c_host_stress_all.73271531553925801763937847958844374347753844910253544461486519893354928935481
    Line 162, in log /nightly/current_run/scratch/master/i2c-sim-vcs/40.i2c_host_stress_all/latest/run.log
```
  UVM_ERROR @ 93771212421 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @8644665
```
UVM_FATAL (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of * ps hit, indicating a probable testbench issue has 1 failures:
- Test i2c_host_stress_all has 1 failures.
  - 49.i2c_host_stress_all.93446791826352729251693663883634313148306938686513225983632621594614608457545
    Line 97, in log /nightly/current_run/scratch/master/i2c-sim-vcs/49.i2c_host_stress_all/latest/run.log
```
  UVM_FATAL @ 600000000000 ps: (uvm_phase.svh:1512) [PH_TIMEOUT] Explicit timeout of 600000000000 ps hit, indicating a probable testbench issue
  UVM_INFO @ 600000000000 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```