MBX Simulation Results

Friday September 12 2025 21:26:36 UTC

GitHub Revision: e14e4d4

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 mbx_smoke mbx_smoke 2.017m 8.665ms 2 2 100.00
V1 csr_hw_reset mbx_csr_hw_reset 3.000s 31.002us 5 5 100.00
V1 csr_rw mbx_csr_rw 3.000s 86.415us 20 20 100.00
V1 csr_bit_bash mbx_csr_bit_bash 6.000s 1.117ms 5 5 100.00
V1 csr_aliasing mbx_csr_aliasing 3.000s 32.740us 5 5 100.00
V1 csr_mem_rw_with_rand_reset mbx_csr_mem_rw_with_rand_reset 5.000s 33.835us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr mbx_csr_rw 3.000s 86.415us 20 20 100.00
mbx_csr_aliasing 3.000s 32.740us 5 5 100.00
V1 TOTAL 57 57 100.00
V2 mbx_stress mbx_stress 1.350m 11.562ms 2 2 100.00
V2 mbx_max_activity mbx_stress_zero_delays 33.000s 1.215ms 2 2 100.00
V2 mbx_imbx_oob mbx_imbx_oob 43.000s 6.172ms 1 2 50.00
V2 mbx_doe_intr_msg mbx_doe_intr_msg 18.000s 1.461ms 5 5 100.00
V2 alert_test mbx_alert_test 3.000s 49.835us 50 50 100.00
V2 intr_test mbx_intr_test 3.000s 39.539us 50 50 100.00
V2 tl_d_oob_addr_access mbx_tl_errors 6.000s 391.496us 20 20 100.00
V2 tl_d_illegal_access mbx_tl_errors 6.000s 391.496us 20 20 100.00
V2 tl_d_outstanding_access mbx_csr_hw_reset 3.000s 31.002us 5 5 100.00
mbx_csr_rw 3.000s 86.415us 20 20 100.00
mbx_csr_aliasing 3.000s 32.740us 5 5 100.00
mbx_same_csr_outstanding 4.000s 72.440us 20 20 100.00
V2 tl_d_partial_access mbx_csr_hw_reset 3.000s 31.002us 5 5 100.00
mbx_csr_rw 3.000s 86.415us 20 20 100.00
mbx_csr_aliasing 3.000s 32.740us 5 5 100.00
mbx_same_csr_outstanding 4.000s 72.440us 20 20 100.00
V2 TOTAL 150 151 99.34
V2S tl_intg_err mbx_tl_intg_err 5.000s 1.079ms 20 20 100.00
mbx_sec_cm 3.000s 15.013us 5 5 100.00
V2S TOTAL 25 25 100.00
TOTAL 232 233 99.57

Failure Buckets