e60097d| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | wake_up | aes_wake_up | 29.000s | 0 | 1 | 0.00 | |
| V1 | smoke | aes_smoke | 42.000s | 3 | 50 | 6.00 | |
| V1 | csr_hw_reset | aes_csr_hw_reset | 38.000s | 0 | 5 | 0.00 | |
| V1 | csr_rw | aes_csr_rw | 42.000s | 1 | 20 | 5.00 | |
| V1 | csr_bit_bash | aes_csr_bit_bash | 43.000s | 1 | 5 | 20.00 | |
| V1 | csr_aliasing | aes_csr_aliasing | 30.000s | 0 | 5 | 0.00 | |
| V1 | csr_mem_rw_with_rand_reset | aes_csr_mem_rw_with_rand_reset | 42.000s | 2 | 20 | 10.00 | |
| V1 | regwen_csr_and_corresponding_lockable_csr | aes_csr_rw | 42.000s | 1 | 20 | 5.00 | |
| aes_csr_aliasing | 30.000s | 0 | 5 | 0.00 | |||
| V1 | TOTAL | 7 | 106 | 6.60 | |||
| V2 | algorithm | aes_smoke | 42.000s | 3 | 50 | 6.00 | |
| aes_config_error | 46.000s | 0 | 50 | 0.00 | |||
| aes_stress | 54.000s | 5 | 50 | 10.00 | |||
| V2 | key_length | aes_smoke | 42.000s | 3 | 50 | 6.00 | |
| aes_config_error | 46.000s | 0 | 50 | 0.00 | |||
| aes_stress | 54.000s | 5 | 50 | 10.00 | |||
| V2 | back2back | aes_stress | 54.000s | 5 | 50 | 10.00 | |
| aes_b2b | 45.000s | 3 | 50 | 6.00 | |||
| V2 | backpressure | aes_stress | 54.000s | 5 | 50 | 10.00 | |
| V2 | multi_message | aes_smoke | 42.000s | 3 | 50 | 6.00 | |
| aes_config_error | 46.000s | 0 | 50 | 0.00 | |||
| aes_stress | 54.000s | 5 | 50 | 10.00 | |||
| aes_alert_reset | 47.000s | 2 | 50 | 4.00 | |||
| V2 | failure_test | aes_man_cfg_err | 50.000s | 3 | 50 | 6.00 | |
| aes_config_error | 46.000s | 0 | 50 | 0.00 | |||
| aes_alert_reset | 47.000s | 2 | 50 | 4.00 | |||
| V2 | trigger_clear_test | aes_clear | 55.000s | 0 | 50 | 0.00 | |
| V2 | nist_test_vectors | aes_nist_vectors | 20.000s | 0 | 1 | 0.00 | |
| V2 | reset_recovery | aes_alert_reset | 47.000s | 2 | 50 | 4.00 | |
| V2 | stress | aes_stress | 54.000s | 5 | 50 | 10.00 | |
| V2 | sideload | aes_stress | 54.000s | 5 | 50 | 10.00 | |
| aes_sideload | 42.000s | 3 | 50 | 6.00 | |||
| V2 | deinitialization | aes_deinit | 50.000s | 3 | 50 | 6.00 | |
| V2 | stress_all | aes_stress_all | 42.000s | 1 | 10 | 10.00 | |
| V2 | alert_test | aes_alert_test | 55.000s | 3 | 50 | 6.00 | |
| V2 | tl_d_oob_addr_access | aes_tl_errors | 37.000s | 2 | 20 | 10.00 | |
| V2 | tl_d_illegal_access | aes_tl_errors | 37.000s | 2 | 20 | 10.00 | |
| V2 | tl_d_outstanding_access | aes_csr_hw_reset | 38.000s | 0 | 5 | 0.00 | |
| aes_csr_rw | 42.000s | 1 | 20 | 5.00 | |||
| aes_csr_aliasing | 30.000s | 0 | 5 | 0.00 | |||
| aes_same_csr_outstanding | 47.000s | 0 | 20 | 0.00 | |||
| V2 | tl_d_partial_access | aes_csr_hw_reset | 38.000s | 0 | 5 | 0.00 | |
| aes_csr_rw | 42.000s | 1 | 20 | 5.00 | |||
| aes_csr_aliasing | 30.000s | 0 | 5 | 0.00 | |||
| aes_same_csr_outstanding | 47.000s | 0 | 20 | 0.00 | |||
| V2 | TOTAL | 25 | 501 | 4.99 | |||
| V2S | reseeding | aes_reseed | 48.000s | 0 | 50 | 0.00 | |
| V2S | fault_inject | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| aes_control_fi | 54.000s | 15 | 300 | 5.00 | |||
| aes_cipher_fi | 55.000s | 15 | 350 | 4.29 | |||
| V2S | shadow_reg_update_error | aes_shadow_reg_errors | 38.000s | 1 | 20 | 5.00 | |
| V2S | shadow_reg_read_clear_staged_value | aes_shadow_reg_errors | 38.000s | 1 | 20 | 5.00 | |
| V2S | shadow_reg_storage_error | aes_shadow_reg_errors | 38.000s | 1 | 20 | 5.00 | |
| V2S | shadowed_reset_glitch | aes_shadow_reg_errors | 38.000s | 1 | 20 | 5.00 | |
| V2S | shadow_reg_update_error_with_csr_rw | aes_shadow_reg_errors_with_csr_rw | 38.000s | 1 | 20 | 5.00 | |
| V2S | tl_intg_err | aes_sec_cm | 29.000s | 0 | 5 | 0.00 | |
| aes_tl_intg_err | 51.000s | 0 | 20 | 0.00 | |||
| V2S | sec_cm_bus_integrity | aes_tl_intg_err | 51.000s | 0 | 20 | 0.00 | |
| V2S | sec_cm_lc_escalate_en_intersig_mubi | aes_alert_reset | 47.000s | 2 | 50 | 4.00 | |
| V2S | sec_cm_main_config_shadow | aes_shadow_reg_errors | 38.000s | 1 | 20 | 5.00 | |
| V2S | sec_cm_main_config_sparse | aes_smoke | 42.000s | 3 | 50 | 6.00 | |
| aes_stress | 54.000s | 5 | 50 | 10.00 | |||
| aes_alert_reset | 47.000s | 2 | 50 | 4.00 | |||
| aes_core_fi | 46.000s | 3 | 70 | 4.29 | |||
| V2S | sec_cm_aux_config_shadow | aes_shadow_reg_errors | 38.000s | 1 | 20 | 5.00 | |
| V2S | sec_cm_aux_config_regwen | aes_readability | 47.000s | 2 | 50 | 4.00 | |
| aes_stress | 54.000s | 5 | 50 | 10.00 | |||
| V2S | sec_cm_key_sideload | aes_stress | 54.000s | 5 | 50 | 10.00 | |
| aes_sideload | 42.000s | 3 | 50 | 6.00 | |||
| V2S | sec_cm_key_sw_unreadable | aes_readability | 47.000s | 2 | 50 | 4.00 | |
| V2S | sec_cm_data_reg_sw_unreadable | aes_readability | 47.000s | 2 | 50 | 4.00 | |
| V2S | sec_cm_key_sec_wipe | aes_readability | 47.000s | 2 | 50 | 4.00 | |
| V2S | sec_cm_iv_config_sec_wipe | aes_readability | 47.000s | 2 | 50 | 4.00 | |
| V2S | sec_cm_data_reg_sec_wipe | aes_readability | 47.000s | 2 | 50 | 4.00 | |
| V2S | sec_cm_data_reg_key_sca | aes_stress | 54.000s | 5 | 50 | 10.00 | |
| V2S | sec_cm_key_masking | aes_stress | 54.000s | 5 | 50 | 10.00 | |
| V2S | sec_cm_main_fsm_sparse | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| V2S | sec_cm_main_fsm_redun | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| aes_control_fi | 54.000s | 15 | 300 | 5.00 | |||
| aes_cipher_fi | 55.000s | 15 | 350 | 4.29 | |||
| aes_ctr_fi | 58.000s | 3 | 50 | 6.00 | |||
| V2S | sec_cm_cipher_fsm_sparse | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| V2S | sec_cm_cipher_fsm_redun | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| aes_control_fi | 54.000s | 15 | 300 | 5.00 | |||
| aes_cipher_fi | 55.000s | 15 | 350 | 4.29 | |||
| V2S | sec_cm_cipher_ctr_redun | aes_cipher_fi | 55.000s | 15 | 350 | 4.29 | |
| V2S | sec_cm_ctr_fsm_sparse | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| V2S | sec_cm_ctr_fsm_redun | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| aes_control_fi | 54.000s | 15 | 300 | 5.00 | |||
| aes_ctr_fi | 58.000s | 3 | 50 | 6.00 | |||
| V2S | sec_cm_ctrl_sparse | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| aes_control_fi | 54.000s | 15 | 300 | 5.00 | |||
| aes_cipher_fi | 55.000s | 15 | 350 | 4.29 | |||
| aes_ctr_fi | 58.000s | 3 | 50 | 6.00 | |||
| V2S | sec_cm_main_fsm_global_esc | aes_alert_reset | 47.000s | 2 | 50 | 4.00 | |
| V2S | sec_cm_main_fsm_local_esc | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| aes_control_fi | 54.000s | 15 | 300 | 5.00 | |||
| aes_cipher_fi | 55.000s | 15 | 350 | 4.29 | |||
| aes_ctr_fi | 58.000s | 3 | 50 | 6.00 | |||
| V2S | sec_cm_cipher_fsm_local_esc | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| aes_control_fi | 54.000s | 15 | 300 | 5.00 | |||
| aes_cipher_fi | 55.000s | 15 | 350 | 4.29 | |||
| aes_ctr_fi | 58.000s | 3 | 50 | 6.00 | |||
| V2S | sec_cm_ctr_fsm_local_esc | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| aes_control_fi | 54.000s | 15 | 300 | 5.00 | |||
| aes_ctr_fi | 58.000s | 3 | 50 | 6.00 | |||
| V2S | sec_cm_data_reg_local_esc | aes_fi | 1.217m | 3 | 50 | 6.00 | |
| aes_control_fi | 54.000s | 15 | 300 | 5.00 | |||
| aes_cipher_fi | 55.000s | 15 | 350 | 4.29 | |||
| V2S | TOTAL | 43 | 985 | 4.37 | |||
| V3 | stress_all_with_rand_reset | aes_stress_all_with_rand_reset | 34.000s | 0 | 10 | 0.00 | |
| V3 | TOTAL | 0 | 10 | 0.00 | |||
| TOTAL | 75 | 1602 | 4.68 |
Job returned non-zero exit code has 1525 failures:
Test aes_wake_up has 1 failures.
0.aes_wake_up.39997020236125254179037466664549549607299926675272011377461451158070998687171
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/0.aes_wake_up/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 20, 2025 at 02:13:32 UTC (total: 00:00:29)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
Test aes_nist_vectors has 1 failures.
0.aes_nist_vectors.55896238088361232321121249347983413393518115358503166371459805260086158472786
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/0.aes_nist_vectors/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 20, 2025 at 02:13:24 UTC (total: 00:00:20)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
Test aes_deinit has 47 failures.
0.aes_deinit.81778259844526313304633277023993889617444031981935399860648744517966359838584
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/0.aes_deinit/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 20, 2025 at 02:13:46 UTC (total: 00:00:42)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
1.aes_deinit.99339653754242649310356019658316036791650152723740201605826398522857287783823
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/1.aes_deinit/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 20, 2025 at 02:13:51 UTC (total: 00:00:29)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
... and 45 more failures.
Test aes_man_cfg_err has 47 failures.
0.aes_man_cfg_err.32432463188667377118203255599805958977407767983298356784491978762162292019191
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/0.aes_man_cfg_err/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 20, 2025 at 02:13:38 UTC (total: 00:00:34)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
1.aes_man_cfg_err.65458446570960079360383185921036702237720378969084420239230183734827499071005
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/1.aes_man_cfg_err/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 20, 2025 at 02:14:10 UTC (total: 00:00:46)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
... and 45 more failures.
Test aes_readability has 48 failures.
0.aes_readability.109446508441195074830137246719719567852016869520296568470334100981312036884122
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/0.aes_readability/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 20, 2025 at 02:13:39 UTC (total: 00:00:34)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
1.aes_readability.8282083057383824545699780231232622527363001816087697576533386937502299844621
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/1.aes_readability/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 20, 2025 at 02:14:11 UTC (total: 00:00:47)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
... and 46 more failures.
... and 27 more tests.
Job timed out after * minutes has 1 failures:
12.aes_control_fi.48196172625038059060536642961960940702595292008316878821298468571994840397512
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/12.aes_control_fi/latest/run.log
Job timed out after 1 minutes
UVM_FATAL (aes_control_fi_vseq.sv:62) [aes_control_fi_vseq] wait timeout occurred! has 1 failures:
182.aes_control_fi.27525360517738764559102210463065344484195430418974623806101061779266234351227
Line 146, in log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/182.aes_control_fi/latest/run.log
UVM_FATAL @ 10003018906 ps: (aes_control_fi_vseq.sv:62) [uvm_test_top.env.virtual_sequencer.aes_control_fi_vseq] wait timeout occurred!
UVM_INFO @ 10003018906 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
[Errno *] No such file or directory: '/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/cov_report/cov_report.txt' has 1 failures:
cov_report
Log /nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/cov_report/cov_report.log
[Errno 2] No such file or directory: '/nightly/current_run/scratch/master/aes_unmasked-sim-xcelium/cov_report/cov_report.txt'