AON_TIMER Simulation Results

Friday September 26 2025 17:02:09 UTC

GitHub Revision: c5877ed

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	aon_timer_smoke	2.170s	510.684us	5	5	100.00
V1	csr_hw_reset	aon_timer_csr_hw_reset	1.620s	765.780us	5	5	100.00
V1	csr_rw	aon_timer_csr_rw	1.310s	493.569us	20	20	100.00
V1	csr_bit_bash	aon_timer_csr_bit_bash	8.270s	13.970ms	5	5	100.00
V1	csr_aliasing	aon_timer_csr_aliasing	1.480s	444.457us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	aon_timer_csr_mem_rw_with_rand_reset	1.320s	498.063us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	aon_timer_csr_rw	1.310s	493.569us	20	20	100.00
		aon_timer_csr_aliasing	1.480s	444.457us	5	5	100.00
V1	mem_walk	aon_timer_mem_walk	1.260s	466.151us	5	5	100.00
V1	mem_partial_access	aon_timer_mem_partial_access	1.240s	468.437us	5	5	100.00
V1		TOTAL			70	70	100.00
V2	prescaler	aon_timer_prescaler	1.086m	50.589ms	15	15	100.00
V2	jump	aon_timer_jump	1.630s	755.801us	5	5	100.00
V2	stress_all	aon_timer_stress_all	1.641m	140.248ms	15	15	100.00
V2	alert_test	aon_timer_alert_test	2.080s	502.173us	50	50	100.00
V2	intr_test	aon_timer_intr_test	1.290s	411.818us	50	50	100.00
V2	tl_d_oob_addr_access	aon_timer_tl_errors	2.420s	490.454us	20	20	100.00
V2	tl_d_illegal_access	aon_timer_tl_errors	2.420s	490.454us	20	20	100.00
V2	tl_d_outstanding_access	aon_timer_csr_hw_reset	1.620s	765.780us	5	5	100.00
		aon_timer_csr_rw	1.310s	493.569us	20	20	100.00
		aon_timer_csr_aliasing	1.480s	444.457us	5	5	100.00
		aon_timer_same_csr_outstanding	4.840s	2.730ms	20	20	100.00
V2	tl_d_partial_access	aon_timer_csr_hw_reset	1.620s	765.780us	5	5	100.00
		aon_timer_csr_rw	1.310s	493.569us	20	20	100.00
		aon_timer_csr_aliasing	1.480s	444.457us	5	5	100.00
		aon_timer_same_csr_outstanding	4.840s	2.730ms	20	20	100.00
V2		TOTAL			175	175	100.00
V2S	tl_intg_err	aon_timer_sec_cm	11.440s	4.284ms	5	5	100.00
		aon_timer_tl_intg_err	10.460s	8.685ms	20	20	100.00
V2S	sec_cm_bus_integrity	aon_timer_tl_intg_err	10.460s	8.685ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	max_threshold	aon_timer_smoke_max_thold	1.730s	614.057us	5	5	100.00
V3	min_threshold	aon_timer_smoke_min_thold	2.010s	680.795us	5	5	100.00
V3	wkup_count_hi_cdc	aon_timer_wkup_count_cdc_hi	7.960s	3.632ms	5	5	100.00
V3	custom_intr	aon_timer_custom_intr	2.260s	619.328us	10	10	100.00
V3	alternating_on_off	aon_timer_alternating_enable_on_off	22.310s	4.229ms	5	5	100.00
V3	stress_all_with_rand_reset	aon_timer_stress_all_with_rand_reset	41.640s	9.806ms	15	15	100.00
V3		TOTAL			45	45	100.00
		TOTAL			315	315	100.00

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.89	99.09	99.05	100.00	--	98.56	96.67	100.00