c5877ed| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | kmac_smoke | 1.429m | 36.490ms | 50 | 50 | 100.00 |
| V1 | csr_hw_reset | kmac_csr_hw_reset | 1.430s | 101.141us | 5 | 5 | 100.00 |
| V1 | csr_rw | kmac_csr_rw | 1.530s | 125.582us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | kmac_csr_bit_bash | 18.610s | 2.891ms | 5 | 5 | 100.00 |
| V1 | csr_aliasing | kmac_csr_aliasing | 10.080s | 472.367us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | kmac_csr_mem_rw_with_rand_reset | 3.090s | 441.418us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | kmac_csr_rw | 1.530s | 125.582us | 20 | 20 | 100.00 |
| kmac_csr_aliasing | 10.080s | 472.367us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | kmac_mem_walk | 1.080s | 13.022us | 5 | 5 | 100.00 |
| V1 | mem_partial_access | kmac_mem_partial_access | 1.870s | 42.182us | 5 | 5 | 100.00 |
| V1 | TOTAL | 115 | 115 | 100.00 | |||
| V2 | long_msg_and_output | kmac_long_msg_and_output | 59.395m | 270.143ms | 50 | 50 | 100.00 |
| V2 | burst_write | kmac_burst_write | 16.597m | 305.489ms | 50 | 50 | 100.00 |
| V2 | test_vectors | kmac_test_vectors_sha3_224 | 25.793m | 354.567ms | 5 | 5 | 100.00 |
| kmac_test_vectors_sha3_256 | 20.583m | 148.747ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_384 | 22.429m | 46.969ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_sha3_512 | 16.555m | 196.320ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_128 | 2.641m | 9.565ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_shake_256 | 5.410m | 55.288ms | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac | 2.920s | 116.634us | 5 | 5 | 100.00 | ||
| kmac_test_vectors_kmac_xof | 3.130s | 306.338us | 5 | 5 | 100.00 | ||
| V2 | sideload | kmac_sideload | 6.892m | 86.143ms | 50 | 50 | 100.00 |
| V2 | app | kmac_app | 5.335m | 21.776ms | 50 | 50 | 100.00 |
| V2 | app_with_partial_data | kmac_app_with_partial_data | 4.318m | 54.533ms | 10 | 10 | 100.00 |
| V2 | entropy_refresh | kmac_entropy_refresh | 4.788m | 258.913ms | 50 | 50 | 100.00 |
| V2 | error | kmac_error | 5.790m | 100.099ms | 50 | 50 | 100.00 |
| V2 | key_error | kmac_key_error | 11.250s | 6.362ms | 50 | 50 | 100.00 |
| V2 | sideload_invalid | kmac_sideload_invalid | 2.442m | 10.050ms | 35 | 50 | 70.00 |
| V2 | edn_timeout_error | kmac_edn_timeout_error | 46.800s | 8.125ms | 20 | 20 | 100.00 |
| V2 | entropy_mode_error | kmac_entropy_mode_error | 31.420s | 1.994ms | 20 | 20 | 100.00 |
| V2 | entropy_ready_error | kmac_entropy_ready_error | 1.134m | 7.983ms | 10 | 10 | 100.00 |
| V2 | lc_escalation | kmac_lc_escalation | 47.200s | 4.223ms | 50 | 50 | 100.00 |
| V2 | stress_all | kmac_stress_all | 32.578m | 117.894ms | 50 | 50 | 100.00 |
| V2 | intr_test | kmac_intr_test | 1.160s | 14.448us | 50 | 50 | 100.00 |
| V2 | alert_test | kmac_alert_test | 1.660s | 360.025us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | kmac_tl_errors | 3.990s | 577.771us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | kmac_tl_errors | 3.990s | 577.771us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | kmac_csr_hw_reset | 1.430s | 101.141us | 5 | 5 | 100.00 |
| kmac_csr_rw | 1.530s | 125.582us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 10.080s | 472.367us | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 3.020s | 96.182us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | kmac_csr_hw_reset | 1.430s | 101.141us | 5 | 5 | 100.00 |
| kmac_csr_rw | 1.530s | 125.582us | 20 | 20 | 100.00 | ||
| kmac_csr_aliasing | 10.080s | 472.367us | 5 | 5 | 100.00 | ||
| kmac_same_csr_outstanding | 3.020s | 96.182us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 725 | 740 | 97.97 | |||
| V2S | shadow_reg_update_error | kmac_shadow_reg_errors | 2.890s | 141.945us | 20 | 20 | 100.00 |
| V2S | shadow_reg_read_clear_staged_value | kmac_shadow_reg_errors | 2.890s | 141.945us | 20 | 20 | 100.00 |
| V2S | shadow_reg_storage_error | kmac_shadow_reg_errors | 2.890s | 141.945us | 20 | 20 | 100.00 |
| V2S | shadowed_reset_glitch | kmac_shadow_reg_errors | 2.890s | 141.945us | 20 | 20 | 100.00 |
| V2S | shadow_reg_update_error_with_csr_rw | kmac_shadow_reg_errors_with_csr_rw | 6.160s | 2.553ms | 20 | 20 | 100.00 |
| V2S | tl_intg_err | kmac_sec_cm | 1.063m | 22.758ms | 5 | 5 | 100.00 |
| kmac_tl_intg_err | 5.570s | 1.091ms | 20 | 20 | 100.00 | ||
| V2S | sec_cm_bus_integrity | kmac_tl_intg_err | 5.570s | 1.091ms | 20 | 20 | 100.00 |
| V2S | sec_cm_lc_escalate_en_intersig_mubi | kmac_lc_escalation | 47.200s | 4.223ms | 50 | 50 | 100.00 |
| V2S | sec_cm_sw_key_key_masking | kmac_smoke | 1.429m | 36.490ms | 50 | 50 | 100.00 |
| V2S | sec_cm_key_sideload | kmac_sideload | 6.892m | 86.143ms | 50 | 50 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_shadow | kmac_shadow_reg_errors | 2.890s | 141.945us | 20 | 20 | 100.00 |
| V2S | sec_cm_fsm_sparse | kmac_sec_cm | 1.063m | 22.758ms | 5 | 5 | 100.00 |
| V2S | sec_cm_ctr_redun | kmac_sec_cm | 1.063m | 22.758ms | 5 | 5 | 100.00 |
| V2S | sec_cm_packer_ctr_redun | kmac_sec_cm | 1.063m | 22.758ms | 5 | 5 | 100.00 |
| V2S | sec_cm_cfg_shadowed_config_regwen | kmac_smoke | 1.429m | 36.490ms | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_global_esc | kmac_lc_escalation | 47.200s | 4.223ms | 50 | 50 | 100.00 |
| V2S | sec_cm_fsm_local_esc | kmac_sec_cm | 1.063m | 22.758ms | 5 | 5 | 100.00 |
| V2S | sec_cm_absorbed_ctrl_mubi | kmac_mubi | 3.489m | 12.050ms | 10 | 10 | 100.00 |
| V2S | sec_cm_sw_cmd_ctrl_sparse | kmac_smoke | 1.429m | 36.490ms | 50 | 50 | 100.00 |
| V2S | TOTAL | 75 | 75 | 100.00 | |||
| V3 | stress_all_with_rand_reset | kmac_stress_all_with_rand_reset | 3.778m | 50.729ms | 7 | 10 | 70.00 |
| V3 | TOTAL | 7 | 10 | 70.00 | |||
| TOTAL | 922 | 940 | 98.09 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
|---|---|---|---|---|---|---|---|
| 93.65 | 97.69 | 94.44 | 100.00 | 73.55 | 96.04 | 97.74 | 96.12 |
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=2) has 4 failures:
20.kmac_sideload_invalid.21428437832262894756281923792827407903324536956491220398929744761164865744091
Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/20.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10033317939 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x991c9000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10033317939 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
34.kmac_sideload_invalid.63997896252774310758650874286584706847428951856897239936055865093904049989170
Line 75, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/34.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10136117320 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x484a9000, Comparison=CompareOpEq, exp_data=0x1, call_count=2)
UVM_INFO @ 10136117320 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_ERROR (cip_base_vseq.sv:840) [kmac_common_vseq] Check failed data & ~ro_mask == * (* [*] vs * [*]) has 3 failures:
0.kmac_stress_all_with_rand_reset.112766510255511361039190052337698009561043157757524889946949443328555805023355
Line 289, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/0.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 9670954909 ps: (cip_base_vseq.sv:840) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed data & ~ro_mask == 0 (4 [0x4] vs 0 [0x0])
UVM_INFO @ 9670954909 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
7.kmac_stress_all_with_rand_reset.67242572472088313563051470258793995149698370732938028171880927871351703596093
Line 365, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/7.kmac_stress_all_with_rand_reset/latest/run.log
UVM_ERROR @ 11983498635 ps: (cip_base_vseq.sv:840) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed data & ~ro_mask == 0 (4 [0x4] vs 0 [0x0])
UVM_INFO @ 11983498635 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=9) has 2 failures:
11.kmac_sideload_invalid.37531098150416829381901088336436528658115203784805404747364365900781704686550
Line 85, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/11.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10054060641 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x19b27000, Comparison=CompareOpEq, exp_data=0x1, call_count=9)
UVM_INFO @ 10054060641 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
39.kmac_sideload_invalid.106602050457890343977914580674452850098833041046992511847878124098098510890489
Line 84, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/39.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10153933466 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe6a23000, Comparison=CompareOpEq, exp_data=0x1, call_count=9)
UVM_INFO @ 10153933466 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=10) has 2 failures:
14.kmac_sideload_invalid.15967917281482076284248709180071809765464044016099247956645427949450969242209
Line 84, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/14.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10144113263 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x37d86000, Comparison=CompareOpEq, exp_data=0x1, call_count=10)
UVM_INFO @ 10144113263 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
15.kmac_sideload_invalid.57831290357365227549330043861881875845814859184685551919809635949298434122599
Line 84, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/15.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10050173929 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x71367000, Comparison=CompareOpEq, exp_data=0x1, call_count=10)
UVM_INFO @ 10050173929 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=7) has 1 failures:
0.kmac_sideload_invalid.81716749035733550369691396673791487930420027780419629335155413247931242243221
Line 80, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/0.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10256201956 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xcfed7000, Comparison=CompareOpEq, exp_data=0x1, call_count=7)
UVM_INFO @ 10256201956 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=6) has 1 failures:
13.kmac_sideload_invalid.1498204091890685086354806625184945721850567410674376417106525537071889455431
Line 81, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/13.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10247763503 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xcc5dd000, Comparison=CompareOpEq, exp_data=0x1, call_count=6)
UVM_INFO @ 10247763503 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 1 failures:
26.kmac_sideload_invalid.27458092904591455430633997295827063789346630267913555993385311031576361810518
Line 76, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/26.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10022319332 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xaa354000, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
UVM_INFO @ 10022319332 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=8) has 1 failures:
28.kmac_sideload_invalid.89368950283874954675740674498090501494193886048561925833522602730142169070181
Line 81, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/28.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10158416499 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x5e7b000, Comparison=CompareOpEq, exp_data=0x1, call_count=8)
UVM_INFO @ 10158416499 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=4) has 1 failures:
38.kmac_sideload_invalid.68655030892870820773355593788473897148712384704994019735165660725881172379609
Line 77, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/38.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10071433812 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0xe06d4000, Comparison=CompareOpEq, exp_data=0x1, call_count=4)
UVM_INFO @ 10071433812 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=27) has 1 failures:
43.kmac_sideload_invalid.41716987300775979395438199173760942651246212993497977463507131432575362812369
Line 102, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/43.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10619216569 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x3a014000, Comparison=CompareOpEq, exp_data=0x1, call_count=27)
UVM_INFO @ 10619216569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=19) has 1 failures:
44.kmac_sideload_invalid.101729409985179429972477427352469847270502539662700748448287580494014583512659
Line 92, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/44.kmac_sideload_invalid/latest/run.log
UVM_FATAL @ 10202987257 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x94665000, Comparison=CompareOpEq, exp_data=0x1, call_count=19)
UVM_INFO @ 10202987257 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---