ENTROPY_SRC/RNG_16BITS Simulation Results

Friday October 10 2025 17:09:47 UTC

GitHub Revision: f01486e

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 3.000s 30.132us 50 50 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 3.000s 23.310us 5 5 100.00
V1 csr_rw entropy_src_csr_rw 3.000s 28.849us 20 20 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 25.000s 3.072ms 5 5 100.00
V1 csr_aliasing entropy_src_csr_aliasing 9.000s 970.134us 5 5 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 4.000s 86.690us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 3.000s 28.849us 20 20 100.00
entropy_src_csr_aliasing 9.000s 970.134us 5 5 100.00
V1 TOTAL 105 105 100.00
V2 firmware entropy_src_smoke 3.000s 30.132us 50 50 100.00
entropy_src_rng 14.667m 20.014ms 299 300 99.67
entropy_src_fw_ov 13.667m 20.023ms 299 300 99.67
V2 firmware_mode entropy_src_fw_ov 13.667m 20.023ms 299 300 99.67
V2 rng_mode entropy_src_rng 14.667m 20.014ms 299 300 99.67
V2 rng_max_rate entropy_src_rng_max_rate 20.017m 18.017ms 387 400 96.75
V2 health_checks entropy_src_rng 14.667m 20.014ms 299 300 99.67
V2 conditioning entropy_src_rng 14.667m 20.014ms 299 300 99.67
V2 interrupts entropy_src_rng 14.667m 20.014ms 299 300 99.67
entropy_src_intr 55.000s 973.126us 50 50 100.00
V2 alerts entropy_src_rng 14.667m 20.014ms 299 300 99.67
entropy_src_functional_alerts 10.000s 168.893us 50 50 100.00
V2 stress_all entropy_src_stress_all 11.250m 20.096ms 49 50 98.00
V2 functional_errors entropy_src_functional_errors 7.200m 10.007ms 991 1000 99.10
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 2.550m 2.487ms 50 50 100.00
V2 intr_test entropy_src_intr_test 3.000s 22.680us 50 50 100.00
V2 alert_test entropy_src_alert_test 3.000s 19.844us 50 50 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 31.000s 49.185us 20 20 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 31.000s 49.185us 20 20 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 3.000s 23.310us 5 5 100.00
entropy_src_csr_rw 3.000s 28.849us 20 20 100.00
entropy_src_csr_aliasing 9.000s 970.134us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 1.277ms 20 20 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 3.000s 23.310us 5 5 100.00
entropy_src_csr_rw 3.000s 28.849us 20 20 100.00
entropy_src_csr_aliasing 9.000s 970.134us 5 5 100.00
entropy_src_same_csr_outstanding 5.000s 1.277ms 20 20 100.00
V2 TOTAL 2315 2340 98.93
V2S tl_intg_err entropy_src_sec_cm 3.000s 56.488us 5 5 100.00
entropy_src_tl_intg_err 32.000s 197.702us 20 20 100.00
V2S sec_cm_config_regwen entropy_src_rng 14.667m 20.014ms 299 300 99.67
entropy_src_cfg_regwen 3.000s 27.150us 50 50 100.00
V2S sec_cm_config_mubi entropy_src_rng 14.667m 20.014ms 299 300 99.67
V2S sec_cm_config_redun entropy_src_rng 14.667m 20.014ms 299 300 99.67
V2S sec_cm_intersig_mubi entropy_src_rng 14.667m 20.014ms 299 300 99.67
entropy_src_fw_ov 13.667m 20.023ms 299 300 99.67
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 7.200m 10.007ms 991 1000 99.10
entropy_src_sec_cm 3.000s 56.488us 5 5 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 7.200m 10.007ms 991 1000 99.10
entropy_src_sec_cm 3.000s 56.488us 5 5 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 14.667m 20.014ms 299 300 99.67
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 7.200m 10.007ms 991 1000 99.10
entropy_src_sec_cm 3.000s 56.488us 5 5 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 7.200m 10.007ms 991 1000 99.10
entropy_src_sec_cm 3.000s 56.488us 5 5 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 7.200m 10.007ms 991 1000 99.10
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 10.000s 168.893us 50 50 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 32.000s 197.702us 20 20 100.00
V2S TOTAL 75 75 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 14.300m 19.034ms 50 50 100.00
V3 TOTAL 50 50 100.00
TOTAL 2545 2570 99.03

Coverage Results

Coverage Dashboard

Score Block Branch Statement Expression Toggle Fsm Assertion CoverGroup
85.59 96.19 90.59 98.74 92.35 58.06 97.92 89.50 93.75

Failure Buckets