I2C Simulation Results

Friday October 10 2025 17:09:47 UTC

GitHub Revision: `f01486e`

Branch: master

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	host_smoke	i2c_host_smoke	1.594m	2.171ms	50	50	100.00
V1	target_smoke	i2c_target_smoke	40.550s	4.957ms	50	50	100.00
V1	csr_hw_reset	i2c_csr_hw_reset	1.090s	238.615us	5	5	100.00
V1	csr_rw	i2c_csr_rw	1.120s	28.196us	20	20	100.00
V1	csr_bit_bash	i2c_csr_bit_bash	4.870s	963.070us	5	5	100.00
V1	csr_aliasing	i2c_csr_aliasing	2.230s	92.765us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	i2c_csr_mem_rw_with_rand_reset	1.710s	40.584us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	i2c_csr_rw	1.120s	28.196us	20	20	100.00
		i2c_csr_aliasing	2.230s	92.765us	5	5	100.00
V1		TOTAL			155	155	100.00
V2	host_error_intr	i2c_host_error_intr	8.650s	205.394us	1	50	2.00
V2	host_stress_all	i2c_host_stress_all	31.041m	91.105ms	8	50	16.00
V2	host_maxperf	i2c_host_perf	27.591m	48.587ms	49	50	98.00
V2	host_override	i2c_host_override	1.100s	51.116us	50	50	100.00
V2	host_fifo_watermark	i2c_host_fifo_watermark	5.115m	5.396ms	50	50	100.00
V2	host_fifo_overflow	i2c_host_fifo_overflow	2.711m	2.571ms	50	50	100.00
V2	host_fifo_reset	i2c_host_fifo_reset_fmt	1.720s	187.174us	50	50	100.00
		i2c_host_fifo_fmt_empty	24.580s	585.985us	50	50	100.00
		i2c_host_fifo_reset_rx	11.930s	286.818us	50	50	100.00
V2	host_fifo_full	i2c_host_fifo_full	4.223m	16.494ms	50	50	100.00
V2	host_timeout	i2c_host_stretch_timeout	39.510s	3.300ms	50	50	100.00
V2	i2c_host_mode_toggle	i2c_host_mode_toggle	6.850s	204.538us	16	50	32.00
V2	target_glitch	i2c_target_glitch	4.000s	419.686us	0	2	0.00
V2	target_stress_all	i2c_target_stress_all	12.481m	39.538ms	49	50	98.00
V2	target_maxperf	i2c_target_perf	10.250s	4.173ms	50	50	100.00
V2	target_fifo_empty	i2c_target_stress_rd	56.440s	1.450ms	50	50	100.00
		i2c_target_intr_smoke	10.720s	1.606ms	50	50	100.00
V2	target_fifo_reset	i2c_target_fifo_reset_acq	2.280s	508.783us	50	50	100.00
		i2c_target_fifo_reset_tx	2.660s	1.220ms	50	50	100.00
V2	target_fifo_full	i2c_target_stress_wr	23.227m	62.397ms	50	50	100.00
		i2c_target_stress_rd	56.440s	1.450ms	50	50	100.00
		i2c_target_intr_stress_wr	5.387m	23.154ms	50	50	100.00
V2	target_timeout	i2c_target_timeout	8.980s	4.752ms	50	50	100.00
V2	target_clock_stretch	i2c_target_stretch	2.187m	3.535ms	46	50	92.00
V2	bad_address	i2c_target_bad_addr	8.890s	4.676ms	50	50	100.00
V2	target_mode_glitch	i2c_target_hrst	50.980s	10.014ms	26	50	52.00
V2	target_fifo_watermark	i2c_target_fifo_watermarks_acq	4.390s	2.407ms	50	50	100.00
		i2c_target_fifo_watermarks_tx	2.060s	535.008us	50	50	100.00
V2	host_mode_config_perf	i2c_host_perf	27.591m	48.587ms	49	50	98.00
		i2c_host_perf_precise	5.952m	24.773ms	50	50	100.00
V2	host_mode_clock_stretching	i2c_host_stretch_timeout	39.510s	3.300ms	50	50	100.00
V2	target_mode_tx_stretch_ctrl	i2c_target_tx_stretch_ctrl	35.050s	2.409ms	50	50	100.00
V2	target_mode_nack_generation	i2c_target_nack_acqfull	4.180s	2.001ms	50	50	100.00
		i2c_target_nack_acqfull_addr	4.100s	2.464ms	50	50	100.00
		i2c_target_nack_txstretch	2.270s	481.292us	30	50	60.00
V2	host_mode_halt_on_nak	i2c_host_may_nack	23.010s	556.182us	50	50	100.00
V2	target_mode_smbus_maxlen	i2c_target_smbus_maxlen	3.580s	2.492ms	50	50	100.00
V2	alert_test	i2c_alert_test	1.020s	30.465us	50	50	100.00
V2	intr_test	i2c_intr_test	1.070s	57.006us	50	50	100.00
V2	tl_d_oob_addr_access	i2c_tl_errors	2.970s	173.277us	20	20	100.00
V2	tl_d_illegal_access	i2c_tl_errors	2.970s	173.277us	20	20	100.00
V2	tl_d_outstanding_access	i2c_csr_hw_reset	1.090s	238.615us	5	5	100.00
		i2c_csr_rw	1.120s	28.196us	20	20	100.00
		i2c_csr_aliasing	2.230s	92.765us	5	5	100.00
		i2c_same_csr_outstanding	1.540s	26.226us	20	20	100.00
V2	tl_d_partial_access	i2c_csr_hw_reset	1.090s	238.615us	5	5	100.00
		i2c_csr_rw	1.120s	28.196us	20	20	100.00
		i2c_csr_aliasing	2.230s	92.765us	5	5	100.00
		i2c_same_csr_outstanding	1.540s	26.226us	20	20	100.00
V2		TOTAL			1615	1792	90.12
V2S	tl_intg_err	i2c_tl_intg_err	2.730s	1.055ms	20	20	100.00
		i2c_sec_cm	1.360s	126.770us	5	5	100.00
V2S	sec_cm_bus_integrity	i2c_tl_intg_err	2.730s	1.055ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	host_stress_all_with_rand_reset	i2c_host_stress_all_with_rand_reset	1.028m	1.093ms	0	10	0.00
V3	target_error_intr	i2c_target_unexp_stop	3.510s	2.753ms	0	50	0.00
V3	target_stress_all_with_rand_reset	i2c_target_stress_all_with_rand_reset	36.470s	4.042ms	0	10	0.00
V3		TOTAL			0	70	0.00
		TOTAL			1795	2042	87.90

Coverage Results

Coverage Dashboard

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
84.03	97.25	89.21	74.17	47.62	93.83	96.41	89.75

Failure Buckets

UVM_ERROR sequencer [sequencer] Get_next_item called twice without item_done or get in between has 96 failures:

Test i2c_host_error_intr has 49 failures.

0.i2c_host_error_intr.46183628082881599153104895100337775107804189953310464384626466534663979070421
Line 91, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_error_intr/latest/run.log

  UVM_ERROR @ 352135775 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 352135775 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_error_intr.46597808581247828827051510959056717577856271849216746166050473518333421223560
Line 91, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_error_intr/latest/run.log

  UVM_ERROR @ 136642369 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 136642369 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 47 more failures.

Test i2c_host_stress_all has 29 failures.

0.i2c_host_stress_all.63890555122887377702478824764669749195854002572896755356471538692819135114826
Line 87, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all/latest/run.log

  UVM_ERROR @  15106819 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  15106819 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all.110763674714429842809836614731483585165245167594082272325968107296773527505173
Line 87, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all/latest/run.log

  UVM_ERROR @   3515870 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @   3515870 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 27 more failures.

Test i2c_target_stress_all_with_rand_reset has 7 failures.

0.i2c_target_stress_all_with_rand_reset.15260994480693543043354363240405019401637980587967456572012619955661848773562
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @  61056384 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  61056384 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_stress_all_with_rand_reset.41652096674803868675287345723039588708746701490675023162030398599544185028908
Line 102, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1019928555 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @ 1019928555 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 5 more failures.

Test i2c_host_mode_toggle has 11 failures.

2.i2c_host_mode_toggle.107754591803753043617462205451844807529791903793301500116977989320383772314054
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  29011449 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  29011449 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

6.i2c_host_mode_toggle.114106254626287780390896301776337658846155595519747432256312937810820648094892
Line 78, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  25804177 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] Get_next_item called twice without item_done or get in between
  UVM_INFO @  25804177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 9 more failures.

UVM_ERROR (i2c_scoreboard.sv:682) [scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (* [*] vs * [*]) has 25 failures:
- Test i2c_target_unexp_stop has 25 failures.
  - 0.i2c_target_unexp_stop.109912201180238006544112777410613053463657106217151918811507756405467616313359
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @  95692629 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 51 [0x33])
  UVM_INFO @  95692629 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 6.i2c_target_unexp_stop.111452670192507352168609682632259607317703745006900720851147507847393043303175
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @  61124476 ps: (i2c_scoreboard.sv:682) [uvm_test_top.env.scoreboard] Check failed obs.data_q[i] == exp.data_q[i] (255 [0xff] vs 6 [0x6])
  UVM_INFO @  61124476 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 23 more failures.
UVM_FATAL (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred! has 24 failures:
- Test i2c_target_hrst has 24 failures.
  - 5.i2c_target_hrst.58126275017307730228901474942956332186310852754021340645882739271301626365230
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10055418444 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10055418444 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 7.i2c_target_hrst.113529468735378546985341088182341526769603383802960341850870258475526822931517
    Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/7.i2c_target_hrst/latest/run.log
```
  UVM_FATAL @ 10669762594 ps: (i2c_target_hrst_vseq.sv:107) [target_hrst_vseq] wait timeout occurred!
  UVM_INFO @ 10669762594 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 22 more failures.
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_*] Check failed obs == exp (* [*] vs * [*]) Regname: i2c_reg_block.target_nack_count reset value: * has 20 failures:
- Test i2c_target_nack_txstretch has 20 failures.
  - 1.i2c_target_nack_txstretch.3823652604271522371828534231872081566230221625159170600457851677144251995492
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 136184139 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 136184139 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 3.i2c_target_nack_txstretch.17354373364594545059206663141956950516988408003532910588247572368226777497756
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_nack_txstretch/latest/run.log
```
  UVM_ERROR @ 1832834845 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: i2c_reg_block.target_nack_count reset value: 0x0
  UVM_INFO @ 1832834845 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 18 more failures.

UVM_ERROR (i2c_scoreboard.sv:716) [scoreboard] controller_mode_rd_obs_fifo item uncompared: has 18 failures:

Test i2c_host_stress_all has 10 failures.

2.i2c_host_stress_all.44764018801802010639408566713734577591414427934624979069072427697422402549524
Line 175, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 17846055479 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @6036511

6.i2c_host_stress_all.18931340550414746525935252351453416538247346771926923109989468647583241015202
Line 118, in log /nightly/current_run/scratch/master/i2c-sim-vcs/6.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 60833258772 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @13963887

... and 8 more failures.

Test i2c_host_mode_toggle has 8 failures.

4.i2c_host_mode_toggle.112839218038359388498330255883518102391764917776011815577357398323215276581577
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/4.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 133249133 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @91712

8.i2c_host_mode_toggle.21039794986296637989577322509816313192312398377470120981230956378444633439026
Line 82, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 752400016 ps: (i2c_scoreboard.sv:716) [uvm_test_top.env.scoreboard] controller_mode_rd_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @30534

... and 6 more failures.

UVM_ERROR (i2c_base_vseq.sv:1474) [i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (* [*] vs * [*]) has 17 failures:
- Test i2c_target_unexp_stop has 17 failures.
  - 1.i2c_target_unexp_stop.12435201043559789107792135235265624251460473194900937107905624302973401712528
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 493515747 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 493515747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 2.i2c_target_unexp_stop.114032967981701206055745834614516676574259146778524659395993178524150760775554
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/2.i2c_target_unexp_stop/latest/run.log
```
  UVM_ERROR @ 1175956580 ps: (i2c_base_vseq.sv:1474) [uvm_test_top.env.virtual_sequencer.i2c_target_ack_stop_vseq] Check failed obs_intr_state[intr] == exp_val (0 [0x0] vs 1 [0x1])
  UVM_INFO @ 1175956580 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 15 more failures.

UVM_ERROR (cip_base_vseq.sv:1229) [i2c_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 13 failures:

Test i2c_host_stress_all_with_rand_reset has 10 failures.

0.i2c_host_stress_all_with_rand_reset.93459540753282150895347367602081528478508215711025661516869266141983121400527
Line 87, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 864712389 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 864712389 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_host_stress_all_with_rand_reset.113334479756064724243266039321190445311664997739685958086631037160049045372681
Line 90, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_host_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 1109407328 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 1109407328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 8 more failures.

Test i2c_target_stress_all_with_rand_reset has 3 failures.

3.i2c_target_stress_all_with_rand_reset.87542593772828256549214642810181711123307697438057121203212933268198986985426
Line 99, in log /nightly/current_run/scratch/master/i2c-sim-vcs/3.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 4042472385 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10001 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 4042472385 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

5.i2c_target_stress_all_with_rand_reset.30233824019161303442506091758281153805389939959926386007862135989888385702946
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_target_stress_all_with_rand_reset/latest/run.log

  UVM_ERROR @ 349269781 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.i2c_common_vseq] Check failed (!has_outstanding_access()) Waited 10000 cycles to issue a reset with no outstanding accesses.
  UVM_INFO @ 349269781 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 1 more failures.

UVM_ERROR (i2c_scoreboard.sv:627) scoreboard [scoreboard] Miscompare: DUT-Controller, dir:BusOpRead has 12 failures:

Test i2c_host_mode_toggle has 12 failures.

15.i2c_host_mode_toggle.113575743139356156697727798335990538905706311456124196867522704004663262786805
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/15.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @  25143210 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

25.i2c_host_mode_toggle.108932511697198434535362086490027842447993554637717844446729608927019083237878
Line 84, in log /nightly/current_run/scratch/master/i2c-sim-vcs/25.i2c_host_mode_toggle/latest/run.log

  UVM_ERROR @ 136300217 ps: (i2c_scoreboard.sv:627) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] Miscompare: DUT-Controller, dir:BusOpRead
  --> EXP:
  ---------------------------------------------------
  Name            Type                Size  Value
  ---------------------------------------------------

... and 10 more failures.

Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))' has 8 failures:

Test i2c_target_unexp_stop has 8 failures.

5.i2c_target_unexp_stop.22278265207145161176322799264061160404827014733548161055200761332117444290028
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/5.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 161626640 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 161626640 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

8.i2c_target_unexp_stop.112069346146032072346724776705080840711655118440468803133412860612912281330872
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/8.i2c_target_unexp_stop/latest/run.log

      Offending '($stable(tx_fifo_wvalid_i) && $stable(tx_fifo_wdata_i))'
  UVM_ERROR @ 259982122 ps: (i2c_fifos.sv:318) [ASSERT FAILED] TxWriteStableBeforeHandshake_A
  UVM_INFO @ 259982122 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 6 more failures.

UVM_FATAL (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred! has 4 failures:
- Test i2c_target_stretch has 4 failures.
  - 1.i2c_target_stretch.87182082235648189991839826968186296445441947530116952732328903661402788633640
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10049022147 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10049022147 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - 11.i2c_target_stretch.7252883599017321923566307775697001881920166113995124938744444451595226306853
    Line 75, in log /nightly/current_run/scratch/master/i2c-sim-vcs/11.i2c_target_stretch/latest/run.log
```
  UVM_FATAL @ 10007679550 ps: (i2c_base_vseq.sv:759) [process_txq] wait timeout occurred!
  UVM_INFO @ 10007679550 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
  - ... and 2 more failures.

UVM_ERROR sequencer [sequencer] get_next_item/try_next_item called twice without item_done or get in between has 2 failures:

Test i2c_target_glitch has 2 failures.

0.i2c_target_glitch.113750251317381062332103556409422683014864784632270794846112184172812960503634
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/0.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 419686048 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 419686048 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.i2c_target_glitch.38073160696674617123639759678211392408463192052263590103248106153043961483858
Line 81, in log /nightly/current_run/scratch/master/i2c-sim-vcs/1.i2c_target_glitch/latest/run.log

  UVM_ERROR @ 913041869 ps: uvm_test_top.env.m_i2c_agent.sequencer [uvm_test_top.env.m_i2c_agent.sequencer] get_next_item/try_next_item called twice without item_done or get in between
  UVM_INFO @ 913041869 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Job timed out after * minutes has 2 failures:
- Test i2c_host_perf has 1 failures.
  - 10.i2c_host_perf.19111219594455813829377563216383579348063100598681794794379586759920863272854
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/10.i2c_host_perf/latest/run.log
```
  Job timed out after 60 minutes
```
- Test i2c_host_stress_all has 1 failures.
  - 18.i2c_host_stress_all.44012753369655236690451865109172634794902092104255140000373433413576129255533
    Log /nightly/current_run/scratch/master/i2c-sim-vcs/18.i2c_host_stress_all/latest/run.log
```
  Job timed out after 60 minutes
```

UVM_ERROR (i2c_scoreboard.sv:717) [scoreboard] controller_mode_wr_obs_fifo item uncompared: has 2 failures:

Test i2c_host_stress_all has 2 failures.

13.i2c_host_stress_all.112305419140840995849740967809284038221367866802578012613093717383458106127731
Line 119, in log /nightly/current_run/scratch/master/i2c-sim-vcs/13.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 7918641404 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @7703845

48.i2c_host_stress_all.18398150863014504877107166273906370379501517414489308118463377257752206146406
Line 125, in log /nightly/current_run/scratch/master/i2c-sim-vcs/48.i2c_host_stress_all/latest/run.log

  UVM_ERROR @ 17302406556 ps: (i2c_scoreboard.sv:717) [uvm_test_top.env.scoreboard] controller_mode_wr_obs_fifo item uncompared:
  ----------------------------------------------------
  Name            Type                Size  Value
  ----------------------------------------------------
  mon_dut_item    i2c_item            -     @2885229

UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=3) has 2 failures:

Test i2c_host_mode_toggle has 2 failures.

18.i2c_host_mode_toggle.79071425366035001455142930257776132539618217078368405939839133272528680629531
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/18.i2c_host_mode_toggle/latest/run.log

  UVM_FATAL @  63020124 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x4429c314, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @  63020124 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

45.i2c_host_mode_toggle.9215126533857847123657699957115760833249521878076736834188609391302200596116
Line 76, in log /nightly/current_run/scratch/master/i2c-sim-vcs/45.i2c_host_mode_toggle/latest/run.log

  UVM_FATAL @  35218472 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout i2c_reg_block.status.hostidle (addr=0x3e58f914, Comparison=CompareOpEq, exp_data=0x1, call_count=3)
  UVM_INFO @  35218472 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_FATAL (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred! has 1 failures:
- Test i2c_target_stress_all has 1 failures.
  - 23.i2c_target_stress_all.86747727996360863179207719674124076329806292000769779916651789584053257108630
    Line 106, in log /nightly/current_run/scratch/master/i2c-sim-vcs/23.i2c_target_stress_all/latest/run.log
```
  UVM_FATAL @ 101370419144 ps: (i2c_base_vseq.sv:1343) [Failed check for ALL_ACQFIFO_READS_OCCURRED] wait timeout occurred!
  UVM_INFO @ 101370419144 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Error-[NOA] Null object access has 1 failures:
- Test i2c_host_mode_toggle has 1 failures.
  - 46.i2c_host_mode_toggle.92903362000231602312879086459325430054030466385880624044384297749381869556406
    Line 83, in log /nightly/current_run/scratch/master/i2c-sim-vcs/46.i2c_host_mode_toggle/latest/run.log
```
  Error-[NOA] Null object access
  src/lowrisc_dv_i2c_env_0.1/i2c_reference_model.sv, 584
    The object at dereference depth 0 is being used before it was
    constructed/allocated.
    Please make sure that the object is allocated before using it.
```